
25. Flash Memory
25.3.1.3
FMR02 Bit
The lock bit becomes invalid by setting the FMR02 bit to 1 (lock bit disabled). (Refer to 25.3.4 Data Protect Function for details.) The lock bit becomes valid by setting the FMR02 bit to 0 (lock bit enabled).
The FMR02 bit does not change a lock bit state but disables a lock bit function. When the block erase
command is executed while the FMR02 bit is set to 1, the lock bit state changes from 0 (locked) to 1 (unlocked).
25.3.1.4
FMSTP Bit
The FMSTP bit is used to initialize the flash memory control circuits, and also to reduce power consumption in
the flash memory. Access to the flash memory is disabled when the FMSTP bit is set to 1. Set the FMSTP bit
by the program located in an area other than the flash memory.
Set the FMSTP bit to 1 in one of the following cases:
A flash memory access error occurs while erasing or programming in CPU rewrite mode (the FMR00 bit does
not switch back to 1 (ready)).
To further reduce power consumption in low-power consumption mode or on-chip oscillator low-power
consumption mode.
Figure 25.7 shows a flow chart illustrating entering and exiting low power mode. Follow the procedure on the
flow chart.
The flash memory is automatically turned off when entering stop or wait mode, and turned back on when
exiting stop or wait mode. The FMR01 bit in the FMR0 register must be set to 0 (CPU rewrite mode disabled)
to enter stop or wait mode.
25.3.1.5
FMR05 Bit
The FMR05 bit selects access to either the boot ROM or user ROM area in boot mode. Set to 0 (boot ROM area
accessed) to access (read) the boot ROM area or to 1 (user ROM area accessed) to access (read, write, or erase)
the user ROM area.
25.3.1.6
FMR06 Bit
The FMR06 bit is a read-only bit indicating the status of an auto-program operation. The FMR06 bit becomes 1
25.3.1.7
FMR07 Bit
The FMR07 bit is a read-only bit indicating the status of an auto-erase operation. The FMR07 bit becomes 1