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參數(shù)資料
| 型號： | PI7C7300NA |
| 廠商： | PERICOM SEMICONDUCTOR CORP |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PBGA272 |
| 封裝： | PLASTIC, BGA-272 |
| 文件頁數(shù)： | 64/119頁 |
| 文件大?。?/td> | 880K |
| 代理商： | PI7C7300NA |
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PI7C7300
3-PORT PCI-to-PCI BRIDGE
Advanced Information
39
06/04/02 Revision 1.07
TABLE 6-1. SUMMARY OF TRANSACTION ORDERING
Pass
Posted
Write
Delayed
Read
Request
Delayed
Write
Request
Delayed
Read
Completion
Delayed
Write
Completion
Posted Write
No
1
Yes
5
Yes
5
Yes
5
Yes
5
Delayed Read Request
No
2
No
Yes
Delayed Write Request
No
4
No
Yes
Delayed Read
Completion
No
3
Yes
No
Delayed Write
Completion
Yes
No
Note: The superscript accompanying some of the table entries refers to any applicable
ordering rule listed in this section. Many entries are not governed by
these ordering rules; therefore, the implementation can choose whether or not the
transactions pass each other.
The entries without superscripts reflect the PI7C7300’s implementation choices.
The following ordering rules describe the transaction relationships. Each ordering rule
is followed by an explanation, and the ordering rules are referred to by number in
Table 6–1. These ordering rules apply to posted write transactions, delayed write and
read requests, and delayed write and read completion transactions crossing PI7C7300
in the same direction. Note that delayed completion transactions cross PI7C7300 in
the direction opposite that of the corresponding delayed requests.
1. Posted write transactions must complete on the target bus in the order in which
they were received on the initiator bus. The subsequent posted write transaction
can be setting a flag that covers the data in the first posted write transaction; if the
second transaction were to complete before the first transaction, a device
checking the flag could subsequently consume stale data.
2. A delayed read request traveling in the same direction as a previously queued
posted write transaction must push the posted write data ahead of it. The posted
write transaction must complete on the target bus before the delayed read request
can be attempted on the target bus. The read transaction can be to the same
location as the write data, so if the read transaction were to pass the write
transaction, it would return stale data.
3. A delayed read completion must ‘‘pull’’ ahead of previously queued posted write
data traveling in the same direction. In this case, the read data is traveling in the
same direction as the write data, and the initiator of the read transaction is on the
same side of PI7C7300 as the target of the write transaction. The posted write
transaction must complete to the target before the read data is returned
to the initiator. The read transaction can be a reading to a status register of the
initiator of the posted write data and therefore should not complete until the write
transaction is complete.
4. Delayed write requests cannot pass previously queued posted write data. For
posted memory write transactions, the delayed write transaction can set a flag that
covers the data in the posted write transaction. If the delayed write request were to
complete before the earlier posted write transaction, a device checking the flag
could subsequently consume stale data.
5. Posted write transactions must be given opportunities to pass delayed read and
write requests and completions. Otherwise, deadlocks may occur when some
bridges which support delayed transactions and other bridges which do not
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C8140A | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2 PORT PCI TO PCI BRIDGE PLX PCI 6140 COMPARISON |
| PI7C8140AEVB | 功能描述:界面開發(fā)工具 2 Port PCI to PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
| PI7C8140AMA | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2-Port PCI-to-PCI Bridge |
| PI7C8140AMAE | 功能描述:外圍驅動器與原件 - PCI PCI -to -PCI Bridge 2 Port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8148A | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2-PORT PCI-TO-PCI BRIDGE ADVANCE INFORMATION |
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