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參數(shù)資料
| 型號： | PI7C7300NA |
| 廠商： | PERICOM SEMICONDUCTOR CORP |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PBGA272 |
| 封裝： | PLASTIC, BGA-272 |
| 文件頁數(shù)： | 30/119頁 |
| 文件大?。?/td> | 880K |
| 代理商： | PI7C7300NA |
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PI7C7300
3-PORT PCI-to-PCI BRIDGE
Advanced Information
8
06/04/02 Revision 1.07
3.5
Miscellaneous Signals
Name
Pin #
Type
Description
BYPASS
Y4
PI
Reserved. Reserved for future use. Must be tied
HIGH.
PLL_TM
Y3
PI
Reserved. Reserved for future use. Must be tied
LOW.
S_CLKIN
V5
PI
Reserved. Reserved for future use. Must be tied
LOW.
SCAN_TM#
V4
PI
Full-Scan Test Mode Enable (Active LOW).
Connect HIGH for normal operation.
When SCAN_TM# is active, the ten scan chains will be
enabled. The scan clock is P_CLK. The scan input and
outputs are as follows:
S1_REQ[6], S1_REQ[5], S1_REQ[4], S1_REQ[3],
S1_REQ[2], S2REQ#[6], S2REQ#[5], S2REQ#[4],
S1_GNT#[4], S1_GNT#[3], S1_GNT#[2], S2_GNT#[6],
S2_GNT#[5], S2_GNT#[4], S2_GNT#[3], S2_GNT#[2]
SCAN_EN
U5
PID
Full-Scan Enable Control. SCAN_EN should be
tied LOW in normal mode. When SCAN_EN is LOW,
full-scan is in shift operation if SCAN_TM# is active. When
SCAN_EN is HIGH, full-scan is in parallel operation if
SCAN_TM# is active.
3.6
Hot-Swap Signals
LOO
U1
PO
Hot Swap LED. The output of this pin lights a blue
LED to indicate insertion and removal ready status.
If HS_EN is LOW, pin is S2_GNT#[7].
HS_SW#
T2
PI
Hot Swap Switch. When driven LOW, this signal
indicates that the board ejector handle indicates an
insertion or impending extraction of a board. If
HS_EN is LOW, pin is S2_REQ#[7].
HS_EN
U6
PI
Hot Swap Enable. To enable Hot Swap Friendly
support, this signal should be pulled HIGH.
ENUM#
R4
POD
Hot Swap Status Indicator. The output of ENUM#
indicates to the system that an insertion has
occurred of that an extraction is about to occur.
3.7
JTAG Boundary Scan Signals
Name
Pin #
Type
Description
TCK
V2
PIU
Test Clock. Used to clock state information and
data into and out of the PI7C7300 during boundary
scan.
TMS
W1
PIU
Test Mode Select. Used to control the state of the
Test Access Port controller.
TDO
V3
PTS
Test Data Output. When SCAN_EN is HIGH, it is
used (in conjunction with TCK) to shift data out of
the Test Access Port (TAP) in a serial bit stream.
TDI
W2
PIU
Test Data Input. When SCAN_EN is HIGH, it is
used (in conjunction with TCK) to shift data and
instructions into the Test Access Port (TAP) in a
serial bit stream.
TRST#
U3
PIU
Test Reset. Active LOW signal to reset the Test
Access Port (TAP) controller into an initialized
state.
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參數(shù)描述 |
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