參數(shù)資料
型號: PC8641MSH1333JB
廠商: E2V TECHNOLOGIES PLC
元件分類: 微控制器/微處理器
英文描述: MICROPROCESSOR, CBGA1023
封裝: 33 X 33 MM, 2.72 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, CERAMIC, FC-BGA-1023
文件頁數(shù): 76/111頁
文件大小: 1660K
代理商: PC8641MSH1333JB
67
0893C–HIREL–01/10
e2v semiconductors SAS 2010
PC8641 and PC8641D [Preliminary]
16.7
Receiver Specifications
LP-Serial receiver electrical and timing specifications are stated in the text and tables of this section.
Receiver input impedance shall result in a differential return loss better that 10 dB and a common mode
return loss better than 6 dB from 100 MHz to (0.8)*(Baud Frequency). This includes contributions from
on-chip circuitry, the chip package and any off-chip components related to the receiver. AC coupling
components are included in this requirement. The reference impedance for return loss measurements is
100
Ω resistive for differential return loss and 25Ω resistive for common mode.
Note:
1. Total jitter is composed of three components, deterministic jitter, random jitter and single frequency sinusoidal jitter. The
sinusoidal jitter may have any amplitude and frequency in the unshaded region of Figure 16-3 on page 69. The sinusoidal jit-
ter component is included to ensure margin for low frequency jitter, wander, noise, crosstalk and other variable system
effects.
Table 16-8.
Transmitter Differential Output Eye Diagram Parameters
Transmitter Type
VDIFFmin (mV)
VDIFFmax (mV)
A (UI)
B (UI)
1.25 GBaud short range
250
500
0.175
0.39
1.25 GBaud long range
400
800
0.175
0.39
2.5 GBaud short range
250
500
0.175
0.39
2.5 GBaud long range
400
800
0.175
0.39
3.125 GBaud short range
250
500
0.175
0.39
3.125 GBaud long range
400
800
0.175
0.39
Table 16-9.
Receiver AC Timing Specifications – 1.25 GBaud
Characteristic
Symbol
Range
Unit
Notes
Min
Max
Differential Input Voltage
V
IN
200
1600
mV p-p
Measured at receiver
Deterministic Jitter Tolerance
JD
0.37
UI p-p
Measured at receiver
Combined Deterministic and Random
Jitter Tolerance
JDR
0.55
UI p-p
Measured at receiver
Total Jitter Tolerance(1)
JT
0.65
UI p-p
Measured at receiver
Multiple Input Skew
SMI
24
ns
Skew at the receiver input
between lanes of a multilane link
Bit Error Rate
BER
10–12
Unit Interval
UI
800
ps
± 100 ppm
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