參數(shù)資料
型號： PC8641MSH1333JB
廠商： E2V TECHNOLOGIES PLC
元件分類： 微控制器/微處理器
英文描述： MICROPROCESSOR, CBGA1023
封裝： 33 X 33 MM, 2.72 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, CERAMIC, FC-BGA-1023
文件頁數(shù)： 68/111頁
文件大?。?/td> 1660K
代理商： PC8641MSH1333JB
6
0893C–HIREL–01/10
PC8641 and PC8641D [Preliminary]
e2v semiconductors SAS 2010
3.1.1
Absolute Maximum Ratings
Table 3-1 provides the absolute maximum ratings.
Notes:
1. Functional and tested operating conditions are given in Table 3-2 on page 7. Absolute maximum ratings are stress ratings
only, and functional operation at the maxima is not guaranteed. Stresses beyond those listed may affect device reliability or
cause permanent damage to the device.
2. Core 1 characteristics apply only to PC8641D. If two separate power supplies are used for V
DD_Core0 and VDD_Core1, they
must be kept within 100 mV of each other during normal run time.
3. The -0.3 to 2.75V range is for DDR and -0.3 to 1.98V range is for DDR2.
4. The 3.63V maximum is only supported when the port is configured in GMII, MII, RMII, or TBI modes; otherwise the 2.75V
details on the recommended operating conditions per protocol.
5. During run time (M,L,T,O)V
IN and Dn_MVREF may overshoot/undershoot to a voltage and for a maximum duration as shown
Table 3-1.
Absolute Maximum Ratings(1)
Characteristic
Symbol
Maximum Value
Unit
Notes
Cores supply voltages
V
DD_Core0
V
DD_Core1
-0.3 to 1.21 V
V
Cores PLL supply
AV
DD_Core0
AV
DD_Core1
-0.3 to 1.21 V
V
SerDes Transceiver Supply (Ports 1 and 2)
SV
DD
-0.3 to 1.21 V
V
SerDes Serial I/O Supply Port 1
XV
DD_ SRDS1
-0.3 to 1.21 V
V
SerDes Serial I/O Supply Port 2
XV
DD_ SRDS2
-0.3 to 1.21 V
V
SerDes DLL and PLL supply voltage for Port 1 and Port 2
AV
DD_SRDS1
AV
DD_SRDS2
-0.3 to 1.21 V
V
Platform Supply voltage
V
DD_PLAT
-0.3 to 1.21 V
V
Local Bus and Platform PLL supply voltage
AV
DD_LB
AV
DD_PLAT
-0.3 to 1.21 V
V
DDR and DDR2 SDRAM I/O supply voltages
D1_GV
DD
D2_GV
DD
-0.3 to 2.75 V
V
-0.3 to 1.98 V
V
eTSEC 1 and 2 I/O supply voltage
LV
DD
-0.3 to 3.63 V
V
-0.3 to 2.75 V
V
eTSEC 3 and 4 I/O supply voltage
TV
DD
-0.3 to 3.63 V
V
-0.3 to 2.75 V
V
Local Bus, DUART, DMA, Multiprocessor Interrupts, System Control & Clocking,
Debug, Test, JTAG,
Power management, I2C, JTAG and Miscellaneous I/O voltage
OV
DD
-0.3 to 3.63 V
V
Input voltage
DDR and DDR2 SDRAM signals
Dn_MV
IN
-0.3 to (Dn_GV
DD + 0.3)
V
DDR and DDR2 SDRAM reference
Dn_MV
REF
-0.3 to (Dn_GV
DD/2 + 0.3)
V
Three-speed Ethernet signals
LV
IN
TV
IN
GND to (LV
DD + 0.3)
GND to (TV
DD + 0.3)
V
DUART, Local Bus, DMA, Multiprocessor
Interrupts, System Control & Clocking,
Debug, Test, JTAG, Power management,
I
2C, JTAG and Miscellaneous I/O voltage
OV
IN
GND to (0V
DD + 0.3)
V
Storage temperature range
T
STG
-55 to 150
° C
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