參數(shù)資料
型號(hào)： PC8641MSH1333JB
廠商： E2V TECHNOLOGIES PLC
元件分類： 微控制器/微處理器
英文描述： MICROPROCESSOR, CBGA1023
封裝： 33 X 33 MM, 2.72 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, CERAMIC, FC-BGA-1023
文件頁數(shù)： 67/111頁
文件大小： 1660K
代理商： PC8641MSH1333JB
59
0893C–HIREL–01/10
e2v semiconductors SAS 2010
PC8641 and PC8641D [Preliminary]
15.4.3
Differential Receiver (RX) Input Specifications
Table 15-3 defines the specifications for the differential input at all receivers (RXs). The parameters are
specified at the component pins.
Table 15-3.
Differential Receiver (RX) Input Specifications
Symbol
Parameter
Min
Nom
Max
Units
Comments
UI
Unit Interval
399.88
400
400.12
ps
Each UI is 400 ps ± 300 ppm. UI does not
account for Spread Spectrum Clock dictated
variations. See Note (1).
V
RX-DIFFp-p
Differential Peak-to-Peak
Output Voltage
0.175
1.200
V
RX-DIFFp-p = 2*|VRX-D+ - VRX-D-|
See Note
T
RX-EYE
Minimum Receiver Eye
Width
0.4
UI
The maximum interconnect media and
Transmitter jitter that can be tolerated by the
Receiver can be derived as T
RX-MAX-JITTER = 1
- T
RX-EYE = 0.6 UI.
See Notes (2) and (3).
T
RX-EYE-MEDIAN-to-MAX -JITTER
Maximum time between
the jitter median and
maximum deviation from
the median
0.3
UI
Jitter is defined as the measurement variation
of the crossing points (V
RX-DIFFp-p = 0V) in
relation to a recovered TX UI.
A recovered TX UI is calculated over 3500
consecutive unit intervals of sample data.
Jitter is measured using all edges of the 250
consecutive UI in the center of the 3500 UI
used for calculating the TX UI. See Notes
V
RX-CM-ACp
AC Peak Common Mode
Input Voltage
150
mV
V
RX-CM-ACp = |VRXD+ - VRXD-|/2 - VRX-CM-DC
V
RX-CM-DC = DC(avg)of |VRX-D+- VRX-D-|/2
See Note (2)
RL
RX-DIFF
Differential Return Loss
15
dB
Measured over 50 MHz to 1.25 GHz with the
D+ and D-lines biased at +300 mV and -300
mV, respectively.
See Note (4)
RL
RX-CM
Common Mode Return
Loss
6dB
Measured over 50 MHz to 1.25 GHz with the
D+ and D-lines biased at 0V. See Note
Z
RX-DIFF-DC
DC Differential Input
Impedance
80
100
120
Ω
RX DC Differential
Z
RX-DC
DC Input Impedance
40
50
60
Ω
Required RX D+ as well as D-DC Impedance
(50 ± 20% tolerance). See Notes (2) and (5)
Z
RX-HIGH-IMP-DC
Powered Down DC Input
Impedance
200 k
Ω
Required RX D+ as well as D-DC Impedance
when the Receiver terminations do not have
power. See Note (6)
V
RX-IDLE-DET-DIFFp-p
Electrical Idle Detect
Threshold
65
175
mV
V
RX-IDLE-DET-DIFFp-p = 2*|VRX-D+ -VRX-D-|
Measured at the package pins of the Receiver
T
RX-IDLE-DET-DIFF-ENTERTIME
Unexpected Electrical
Idle Enter Detect
Threshold Integration
Time
10
ms
An unexpected Electrical Idle (V
RX-DIFFp-p <
V
RX-IDLE-DET-DIFFp-p) must be recognized no
longer than T
RX-IDLE-DET-DIFF-ENTERING to signal
an unexpected idle condition.
L
TX-SKEW
Total Skew
20
ns
Skew across all lanes on a Link. This includes
variation in the length of SKP ordered set (e.g.
COM and one to five Symbols) at the RX as
well as any delay differences arising from the
interconnect itself.
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