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參數(shù)資料
| 型號(hào)： | PC8641MSH1333JB |
| 廠商： | E2V TECHNOLOGIES PLC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROPROCESSOR, CBGA1023 |
| 封裝： | 33 X 33 MM, 2.72 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, CERAMIC, FC-BGA-1023 |
| 文件頁(yè)數(shù)： | 60/111頁(yè) |
| 文件大?。?/td> | 1660K |
| 代理商： | PC8641MSH1333JB |
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52
0893C–HIREL–01/10
PC8641 and PC8641D [Preliminary]
e2v semiconductors SAS 2010
Figure 12-3 provides the TRST timing diagram.
Figure 12-3. TRST Timing Diagram
Note:
VM = Midpoint Voltage (OV
DD/2).
Figure 12-4 provides the boundary-scan timing diagram.
Figure 12-4. Boundary-scan Timing Diagram
Note:
VM = Midpoint Voltage (OVDD/2).
13. I2C
This section describes the DC and AC electrical characteristics for the I2C interface of the PC8641.
13.1
I2C DC Electrical Characteristics
Table 13-1 provides the DC electrical characteristics for the I
2C interfaces.
Notes:
1. Output voltage (open drain or open collector) condition = 3 mA sink current.
2. Refer to the PC8641 PowerQUICC III Integrated Host Processor Reference Manual for information on the digital filter used.
3. I/O pins will obstruct the SDA and SCL lines if OVDD is switched off.
TRST
tTRST
VM
JTAG
External Clock
Boundary
Data Inputs
Boundary
Data Outputs
Boundary
Data Outputs
tJTDXKH
tJTDVKH
tJTKLDV
tJTKLDZ
Output Data Valid
tJTKLDX
VM
Input
Data Valid
Output Data Valid
Table 13-1.
I
2C DC Electrical Characteristics (At Recommended Operating Conditions with OV
DD of 3.3V ± 5%)
Parameter
Symbol
Min
Max
Unit
Notes
Input high voltage level
VIH
0.7 × OVDD
OVDD + 0.3
V
Input low voltage level
V
IL
-0.3
0.3 × OV
DD
V
Low level output voltage
VOL
0
0.2 × OVDD
V
Pulse width of spikes which must be suppressed by the input filter
tI2KHKL
050
ns
Input current each I/O pin (input voltage is between 0.1 × OV
DD and
0.9 × OVDD (max)
II
-10
10
A
Capacitance for each I/O pin
CI
–10
pF
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