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參數(shù)資料
| 型號： | PC8641MSH1333JB |
| 廠商： | E2V TECHNOLOGIES PLC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | MICROPROCESSOR, CBGA1023 |
| 封裝： | 33 X 33 MM, 2.72 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, CERAMIC, FC-BGA-1023 |
| 文件頁數(shù)： | 42/111頁 |
| 文件大?。?/td> | 1660K |
| 代理商： | PC8641MSH1333JB |
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36
0893C–HIREL–01/10
PC8641 and PC8641D [Preliminary]
e2v semiconductors SAS 2010
9.2.6
RGMII and RTBI AC Timing Specifications
Table 9-12 presents the RGMII and RTBI AC timing specifications
Notes:
1. Note that, in general, the clock reference symbol representation for this section is based on the symbols RGT to represent
RGMII and RTBI timing. For example, the subscript of t
RGT represents the TBI (T) receive (RX) clock. Note also that the nota-
tion for rise (R) and fall (F) times follows the clock symbol that is being represented. For symbols representing skews, the
subscript is skew (SK) followed by the clock that is being skewed (RGT).
2. This implies that PC board design will require clocks to be routed such that an additional trace delay of greater than 1.5 ns
will be added to the associated clock signal.
3. For 10 and 100 Mbps, tRGT scales to 400 ns ± 40 ns and 40 ns ± 4 ns, respectively.
4. Duty cycle may be stretched/shrunk during speed changes or while transitioning to a received packet's clock domains as
long as the minimum duty cycle is not violated and stretching occurs for no more than three t
RGT of the lowest speed transi-
tioned between.
5. Guaranteed by characterization.
Figure 9-12 shows the RGMII and RTBI AC timing and multiplexing diagrams.
Figure 9-12. RGMII and RTBI AC Timing and Multiplexing Diagrams
Table 9-12.
RGMII and RTBI AC Timing Specifications (At Recommended Operating Conditions with L/TV
DD of 2.5V
±
5%)
Parameter/Condition
Symbol(1)
Min
Typ
Max
Unit
Data to clock output skew (at transmitter)
tSKRGT
-500
0
500
ps
Data to clock input skew (at receiver)(2)
t
SKRGT
1–
2.8
ns
Clock period(3)
t
RGT
7.288.8
ns
Duty cycle for 10BASE-T and 100BASE-TX(3)(4)
40
50
60
%
Rise time (20%-80%)
t
RGTR
–
0.75
ns
Fall time (20%-80%)
t
RGTF
–
0.75
ns
GTX_CLK
tRGT
tRGTH
tSKRGT
TX_CTL
TXD[8:5]
TXD[7:4]
TXD[9]
TXERR
TXD[4]
TXEN
TXD[3:0]
(At Transmitter)
TXD[8:5][3:0]
TXD[7:4][3:0]
TX_CLK
(At PHY)
RX_CTL
RXD[8:5]
RXD[7:4]
RXD[9]
RXERR
RXD[4]
RXDV
RXD[3:0]
RXD[8:5][3:0]
RXD[7:4][3:0]
RX_CLK
(At PHY)
tSKRGT
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