
100
0893C–HIREL–01/10
PC8641 and PC8641D [Preliminary]
e2v semiconductors SAS 2010
21.6
Pull-Up and Pull-Down Resistor Requirements
The PC8641 requires weak pull-up resistors (2–10 k
Ω is recommended) on all open drain type pins.
The following pins must NOT be pulled down during power-on reset: TSEC4_TXD[4], LGPL0/LSDA10,
LGPL1/LSDWE, TRIG_OUT/READY, and D1_MSRCID[2].
The following are factory test pins and require strong pull up resistors (100
Ω –1 kΩ) to OV
DD
LSSD_MODE, TEST_MODE[0:3].The following pins require weak pull up resistors (2–10 k
Ω) to their
specific power supplies: LCS [0 :4], LCS [5 ]/DM A _DREQ 2 , L C S [6]/DMA_DA CK [2 ],
LCS[7]/DMA_DDONE[2], IRQ_OUT, IIC1_SDA, IIC1_SCL, IIC2_SDA, IIC2_SCL, and CKSTP_OUT.
The following pins should be pulled to ground with a 100
Ω resistor: SD1_IMP_CAL_TX,
SD2_IMP_CAL_TX. The following pins should be pulled to ground with a 200
Ω resistor:
SD1_IMP_CAL_RX, SD2_IMP_CAL_RX.
TSECn_TX_EN signals require an external 4.7-k
Ω resistor to prevent PHY from seeing a valid Transmit
Enable before it is actively driven.
When the platform frequency is 400 MHz, TSEC1_TXD[1] must be pulled down at reset.
TSEC2_TXD[4] and TSEC2_TX_ER pins function as cfg_dram_type[0 or 1] at reset and MUST BE
VALID BEFORE HRESET ASSERTION when coming out of device sleep mode.
21.6.1
Special instructions for Single Core device
The mechanical drawing for the single core device does not have all the solder balls that exist on the sin-
gle core device. This includes all the balls for V
DD_Core1 and SENSEVDD_Core1 which exist on the
package for the dual core device, but not on the single core package. A solder ball is present for
SENSEV
SS_Core1 and needs to be connected to ground with a weak (2-10 kΩ) pull down resistor. Like-
wise, AV
21.7
Output Buffer DC Impedance
The PC8641 drivers are characterized over process, voltage, and temperature. For all buses, the driver
is a push-pull single-ended driver type (open drain for I2C).
To measure Z0 for the single-ended drivers, an external resistor is connected from the chip pad to OV
DD
or GND. Then, the value of each resistor is varied until the pad voltage is OV
page 101). The output impedance is the average of two components, the resistances of the pull-up and
pull-down devices.
When data is held high, SW1 is closed (SW2 is open) and R
P is trimmed until the voltage at the pad
equals OV
DD/2. RP then becomes the resistance of the pull-up devices. RP and RN are designed to be
close to each other in value. Then, Z0 = (R
P + RN)/2.