參數(shù)資料
型號(hào)： PC8641MSH1333JB
廠商： E2V TECHNOLOGIES PLC
元件分類： 微控制器/微處理器
英文描述： MICROPROCESSOR, CBGA1023
封裝： 33 X 33 MM, 2.72 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, CERAMIC, FC-BGA-1023
文件頁(yè)數(shù)： 13/111頁(yè)
文件大?。?/td> 1660K
代理商： PC8641MSH1333JB
11
0893C–HIREL–01/10
e2v semiconductors SAS 2010
PC8641 and PC8641D [Preliminary]
Figure 3-2 illustrates the Power Up sequence as described above.
Figure 3-2.
PC8641 Power-Up and Reset Sequence
Notes:
1. Dotted waveforms correspond to optional supply values for a specified power supply. See Table 3-2 on
2. The recommended maximum ramp up time for power supplies is 20 milliseconds.
3. Refer to Section 6. ”RESET Initialization” on page 17 for additional information on PLL relock and reset
signal assertion timing requirements.
4. Refer to Table 6-1 on page 17 for additional information on reset configuration pin setup timing require-
ments. In addition see Figure 21-6 on page 104 regarding HRESET and JTAG connection details
including TRST.
5. e600 PLL relock time is 100 microseconds maximum plus 255 MPX_clk cycles.
6. POR configuration signals must be driven on reset. See Section 6. ”RESET Initialization” on page 17 for
more information on setup and hold time of reset configuration signals.
7. VDD_PLAT, AVDD_PLAT must strictly reach 90% of their recommended voltage before the rail for
Dn_GV
DD, and Dn_MVREF reaches 10% of their recommended voltage.
8. SYSCLK must be driven only AFTER the power for the various power supplies is stable.
9. In device sleep mode, the reset configuration signals for DRAM types (TSEC2_TXD[4],TSEC2_TX_ER)
must be valid BEFORE HRESET is asserted.
DC
Power
Supply
Voltage
VDD_PLAT, AVDD_PLAT
L/T/OVDD
Time
2.5 V
3.3 V
1.2 V
0
Reset
Configuration Pins
HRESET (& TRST)
100 s Platform PLL
Asserted for
Power Supply Ramp Up 2
e6005
AVDD_LB, SVDD, XVDD_SRDSn
VDD_Coren, AVDD_Coren
AVDD_SRDSn
1.8 V
D
n_GVDD, = 1.8/2.5 V
D
n_MVREF
If
SYSCLK 8 (not drawn to scale)
Relock Time 3
L/TVDD=2.5 V
1
7
PLL
9
SYSCLK is functional 4
Cycles Setup and hold Time
6
100
μs after
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