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CHAPTER 7
8-BIT TIMER/EVENT COUNTERS 50, 51
User’s Manual U12790EJ2V0UD
7.4.5 Operation as interval timer (16-bit)
The 8-bit timer/event counters are used together in 16-bit timer/counter mode when bit 4 (TMC514) of 8-bit timer
mode control register 51 (TM51) is set to 1.
In this mode, the 8-bit timer/event counters are used as a 16-bit interval timer that repeatedly generates an interrupt
request at intervals specified by the count value preset to the 8-bit compare registers (CR50 and CR51).
At this time, CR50 serves as the lower 8 bits of the 16-bit compare register, and CR51 serves as the higher 8 bits.
[Setting]
<1> Set each register.
TCL50:
Select a count clock for TM50.
The count clock for TM51, which is cascaded, does not have to be set.
CR50 and CR51:
Set compare values (each compare value can be set in a range of 00H to FFH).
TMC50 and TMC51:
Select clear & start mode on match between TM50 and CR50 (or between TM51
and CR51).
TM50
→ TMC50 = 0000×××0B ×: don’t care
TM51
→ TMC51 = 0001×××0B ×: don’t care
<2> The count operation is started by setting TCE51 of TMC51 to 1 first, and then TCE50 of TMC50 to 1.
<3> If the value of cascaded timer TM50 matches the value of CR50, INTTM50 of TM50 is generated (TM50 and
TM51 are cleared to 00H).
<4> After that, INTTM50 is repeatedly generated at fixed intervals.
Cautions 1. Be sure to set the compare registers (CR50 and CR51) after stopping the operation of
both timers (TCE50 = TCE51 = 0).
2. Even if the 8-bit timer/counters are cascaded, INTTM51 of TM51 is generated when the
count value of TM51 matches CR51. Be sure to mask TM51 to disable this interrupt.
3. Set TCE50 and TCE51 in the order of TM51 then TM50.
4. Counting can be restarted or stopped just by setting or resetting TCE50 of TM50 to 1
or 0.
Figure 7-13 shows a timing example in the 16-bit cascade connection mode.