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CHAPTER 13
SERIAL INTERFACE SIO0
User’s Manual U12790EJ2V0UD
Figure 13-6. Format of Serial Bus Interface Control Register 0 (SBIC0) (2/3)
(a) SBI mode
Note
The busy mode can be canceled by the start of serial interface transfer or address signal reception.
However, the BSYE flag is not cleared to 0.
Remark
CSIE0: Bit 7 of serial operating mode register 0 (CSIM0)
ACKE
Control of acknowledge signal output
0
Acknowledge signal automatic output disabled (output with ACKT enabled)
The acknowledge signal is output in synchronization with the 9th falling
edge of SCK0 (automatically output when ACKE = 1).
Before completion of
transfer
The acknowledge signal is output in synchronization with the falling edge of
SCK0 just after execution of the instruction to be set to 1
(automatically output when ACKE = 1).
However, not automatically cleared to 0 after acknowledge signal output.
After completion of
transfer
1
R/W
R
ACKD
Detection of acknowledge
Clear conditions (ACKD = 0)
Falling edge of SCK0 immediately after the busy
mode is released after executing the transfer
start instruction
When CSIE0 = 0
When reset input is applied
Set conditions (ACKD = 1)
When acknowledge signal (ACK) is detected at the
rising edge of SCK0 clock after completion of
transfer
BSYE
Synchronization of busy signal output control
0
Busy signal output in synchronization with the falling edge of SCK0 clock just after
execution of the instruction to be cleared to 0 disabled.
R/W
Note
1
Busy signal output at the falling edge of SCK0 clock following the acknowledge signal.
ACKT
The acknowledge signal is output in synchronization with the falling edge of SCK0 just after execution
of the instruction to be set to 1, and after acknowledge signal output, automatically cleared to 0.
Used as ACKE = 0. Also cleared to 0 upon start of serial interface transfer or when CSIE0 = 0.
R/W