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CHAPTER 14
SERIAL INTERFACE SIO1
User’s Manual U12790EJ2V0UD
(c) Repeat transmit mode
In this mode, data stored in the buffer RAM is transmitted repeatedly.
Serial transfer is started by writing any data to serial I/O shift register 1 (SIO1) when bit 7 (CSIE1) of serial
operating mode register 1 (CSIM1) is set to 1, and bit 7 (RE) of the automatic data transmit/receive control
register (ADTC) is set to 0.
Unlike the basic transmit mode, after the last byte (data in address FAC0H) has been transmitted, the
interrupt request flag (CSIIF1) is not set, the value when the transmission was started is set in the
automatic data transmit/receive address pointer (ADTP) again, and the buffer RAM contents are
transmitted again.
When a reception operation, busy control, and strobe control are not performed, the P20/SI1, P23/STB
and P24/BUSY pins can be used as ordinary I/O pins.
The repeat transmit mode operation timing is shown in Figure 14-14, and the operation flowchart in Figure
14-15.
Figure 14-14. Repeat Transmit Mode Operation Timing
Caution
Since, in the repeat transmit mode, a read is performed on the buffer RAM after the
transmission of one byte, the interval is included in the period up to the next transmission.
As the buffer RAM read is performed at the same time as CPU processing, the maximum
interval is dependent upon the CPU processing and the value of the automatic data
transmit/receive interval specification register (ADTI) (refer to (6) Automatic data transmit/
receive interval).
D7 D6 D5 D4 D3 D2 D1 D0
Interval
D7 D6 D5
SCK1
SO1