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CHAPTER 3
CPU ARCHITECTURE
User’s Manual U12790EJ2V0UD
Table 3-4. Special-Function Registers (3/4)
Address
Special-Function Register (SFR) Name
Symbol
R/W
Manipulatable Bits
After Reset
18
16
FFA2H
PLL unlock F/F judge register
PLLUL
R&Reset
—
Undefined
FFA3H
PLL data transfer register
PLLNS
W
—
00H
FFA6H
PLL data registers
PLL data register L
PLLR
PLLRL
R/W
Undefined
FFA7H
PLL data register H
PLLRH
FFA8H
PLL data register 0
PLLR0
—
FFA9H
IF counter mode select register
IFCMD
—
00H
FFAAH
DTS system clock select register
DTSCK
—
FFABH
IF counter gate judge register
IFCJG
R
—
FFACH
IF counter control register
IFCCR
W
—
FFAEH
IF counter register
IFCR
IFCRL
R
—
FFAFH
IFCRH
—
FFB0H
IEBus control register 0Note 1
BCR0
R/W
—
FFB2H
IEBus unit address registerNote 1
UAR
UARL
—
FFB3H
UARH
—
FFB4H
IEBus slave address registerNote 1
SAR
SARL
—
FFB5H
SARH
—
FFB6H
IEBus partner unit address registerNote 1
PAR
PARL
—
FFB7H
PARH
—
FFB8H
IEBus control data registerNote 1
CDR
—
01H
FFB9H
IEBus telegraph length registerNote 1
DLR
—
FFBAH
IEBus data registerNote 1
DR
—
00H
FFBBH
IEBus unit status registerNote 1
USR
R
—
FFBCH
IEBus interrupt status registerNote 1
ISR
R/W
—
FFBDH
IEBus slave status registerNote 1
SSR
R
—
41H
FFBEH
IEBus communication successful counterNote 1
SCR
—
01H
FFBFH
IEBus transmission counterNote 1
CCR
—
20H
FFD0H
External access areaNote 2
R/W
—
Undefined
|
FFDFH
FFE0H
Interrupt request flag register 0L
IF0
IF0L
00H
FFE1H
Interrupt request flag register 0H
IF0H
FFE2H
Interrupt request flag register 1L
IF1L
—
FFE4H
Interrupt mask flag register 0L
MK0
MK0L
FFH
FFE5H
Interrupt mask flag register 0H
MK0H
FFE6H
Interrupt mask flag register 1L
MK1L
—
Notes 1.
PD178096A, 178098A, and 178F098 only
2. The external access area cannot be accessed by means of SFR addressing. Use direct addressing to
access this area.
Caution Do not access addresses to which no SFR is assigned.