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CHAPTER 17
IEBus CONTROLLER (
PD178096A, 178098A, 178F098 ONLY)
User’s Manual U12790EJ2V0UD
(2) IEBus unit address register (UAR)
This register sets the local
address of an IEBus unit.
This register must be always set before starting
communication.
The unit address (12 bits) is set to bits 11 to 0.
Figure 17-12. Format of IEBus Unit Address Register (UAR)
(3) IEBus slave address register (SAR)
When a master request is issued, the value of this register is reflected in the value of the transmit data in the slave
address field. This register must always be set before starting communication.
The slave address (12 bits) is set to bits 11 to 0.
Figure 17-13. Format of IEBus Slave Address Register (SAR)
(4) IEBus partner address register (PAR)
(a) Slave unit
The value of the receive data in the master address field (address of the master unit) is written to this register.
If a request “4H” to read the lock address (lower 8 bits) is received from the master, the CPU must read the
value of this register, and write it to the lower 8 bits of the IEBus data register (DR).
If a request “5H” to read the lock address (higher 4 bits) is received from the master, the CPU must read
the value of this register and write the data of the higher 4 bits to DR.
The partner address (12 bits) is set to bits 11 to 0.
Figure 17-14. Format of IEBus Partner Address Register (PAR)
15
0
14
0
13
0
12
0
UAR
11 10
9
876
54
3
210
After reset: 0000H
R/W
Address: FFB2H
15
0
14
0
13
0
12
0
SAR
11 10
9
876
54
3
210
After reset: 0000H
R/W
Address: FFB4H
15
0
14
0
13
0
12
0
PAR
11 10
9
876
54
3
210
After reset: 0000H
R
Address: FFB6H