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CHAPTER 6
16-BIT TIMER/EVENT COUNTER 0
User’s Manual U12790EJ2V0UD
Figure 6-2. Format of 16-Bit Timer Mode Control Register 0 (TMC0)
TMC03 TMC02 TMC01 Selection of operating mode
Selection of TO0 output
Generation of interrupt
and clear mode
timing
request
0
Operation stops
Not affected
Not generated
001
(TM0 is cleared to 0).
0
1
0
Free-running mode
Match between TM0
Generated on match
and CR00 or CR01
between TM0 and CR00 or
0
1
Match between TM0
CR01
and CR00 or CR01, or valid
edge of TI00
1
0
Clear & start at valid edge
Match between TM0
of TI00
and CR00 or CR01
1
0
1
Match between TM0
and CR00 or CR01, or valid
edge of TI00
1
0
Clear & start on
Match between TM0
match between TM0
and CR00 or CR01
111
and CR00
Match between TM0
and CR00 or CR01, or valid
edge of TI00
OVF0
Detection of overflow of 16-bit timer counter 0
0
Overflow
1
No overflow
Cautions 1. Write the bits other than the OVF0 flag after stopping the timer operation.
2. The valid edge of the TI00/P32 pin is selected by prescaler mode register 0 (PRM0).
3. If a mode in which TM0 is cleared and started on a match between TM0 and CR00 is
selected, and if the value of TM0 changes from FFFFH to 0000H with CR00 set to FFFFH,
the OVF0 flag is set to 1.
Remark
TO0:
Output pin of 16-bit timer/event counter 0
TI00: Input pin of 16-bit timer/event counter 0
TM0: 16-bit timer counter 0
CR00: 16-bit capture/compare register 00
CR01: 16-bit capture/compare register 01
7
0
6
0
5
0
4
0
3
TMC03
2
TMC02
1
TMC01
<0>
OVF0
Symbol
TMC0
Address
FF78H
After reset
00H
R/W