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CHAPTER 16
SERIAL INTERFACE UART0 (
PD178076, 178078, AND 178F098 ONLY)
User’s Manual U12790EJ2V0UD
(e) Reception error
Three types of errors: a parity error, framing error, and overrun error, may occur during reception. If the
error flag in asynchronous serial interface status register 0 (ASIS0) is set as a result of receiving data,
the reception error interrupt request (INTSER0) is generated. This interrupt occurs before the reception
completion interrupt request (INTSR0). Table 16-3 shows the causes of reception errors.
Which error has occurred during reception can be identified by reading the contents of ASIS0 in the
reception error processing (INTSER0) (refer to Table 16-3 and Figure 16-10).
The contents of ASIS0 are reset when receive buffer register 0 (RXB0) is read or the next data is received
(if an error occurs in the next data, the corresponding error flag is set).
Table 16-3. Causes of Reception Errors
Reception Error
Cause
Value of ASIS0
Parity error
Parity specified for transmission does not match parity of receive data.
04H
Framing error
Stop bit is not detected.
02H
Overrun error
Reception of next data is completed before data is read from receive buffer register 0.
01H
Figure 16-10. Reception Error Timing
Note
If a reception error occurs while the ISRM0 bit is set to 1, INTSR0 does not occur.
Cautions 1. The contents of asynchronous serial interface status register 0 (ASIS0) are reset to
0 when receive buffer register 0 (RXB0) is read or the next data is received. To identify
the error, be sure to read ASIS0 before reading RXB0.
2. Be sure to read receive buffer register 0 (RXB0) even if a reception error occurs.
Otherwise, an overrun error occurs when the next data is received, and the reception
error status persists.
RXD0 (input)
INTSR0
Note
D0
START
D1
D2
D6
D7
Parity
STOP
INTSER0
(If framing/overrun error occurs)
INTSER0
(If parity error occurs)