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CHAPTER 3
CPU ARCHITECTURE
User’s Manual U12790EJ2V0UD
Table 3-4. Special-Function Registers (2/4)
Address
Special-Function Register (SFR) Name
Symbol
R/W
Manipulatable Bits
After Reset
18
16
FF5AH
Asynchronous serial interface mode register 0Note
ASIM0
R/W
—
00H
FF5BH
Asynchronous serial interface status register 0Note
ASIS0
R
—
FF5CH
Baud rate generator control register 0Note
BRGC0
R/W
—
FF5DH
Transmit shift register 0Note
TXS0
W
—
FFH
Receive buffer register 0Note
RXB0
R
—
FFH
FF60H
Serial operating mode register 0
CSIM0
R/W
—
00H
FF61H
Serial bus interface control register 0
SBIC0
—
FF62H
Slave address register 0
SVA0
—
Undefined
FF63H
Interrupt timing specification register 0
SINT0
—
00H
FF67H
Serial I/O shift register 1
SIO1
—
Undefined
FF68H
Serial operating mode register 1
CSIM1
—
00H
FF69H
Automatic data transmit/receive address pointer
ADTP
—
FF6AH
Automatic data transmit/receive control register
ADTC
—
FF6BH
Automatic data transmit/receive interval specification
ADTI
—
register
FF6EH
Serial I/O shift register 3
SIO3
—
Undefined
FF6FH
Serial operating mode register 3
CSIM3
—
00H
FF70H
16-bit timer counter 0
TM0
R
—
0000H
FF71H
——
FF72H
16-bit capture/compare register 00
CR00
R/W
—
Undefined
FF73H
——
FF74H
16-bit capture/compare register 01
CR01
—
FF75H
——
FF78H
16-bit timer mode control register 0
TMC0
—
00H
FF7AH
Prescaler mode register 0
PRM0
—
FF7CH
Capture/compare control register 0
CRC0
—
FF7EH
16-bit timer output control register 0
TOC0
—
FF80H
8-bit compare register 50
CR50
—
Undefined
FF81H
8-bit compare register 51
CR51
—
FF82H
8-bit timer counter 50
TM5
TM50
R
—
00H
FF83H
8-bit timer counter 51
TM51
—
FF84H
Timer clock select register 50
TCL50
R/W
—
FF85H
8-bit timer mode control register 50
TMC50
—
FF87H
Timer clock select register 51
TCL51
—
FF88H
8-bit timer mode control register 51
TMC51
—
FFA0H
PLL mode select register
PLLMD
—
FFA1H
PLL reference mode register
PLLRF
—
0FH
Note
PD178076, 178078, and 178F098 only
Caution Do not access addresses to which no SFR is assigned.
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