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CHAPTER 16
SERIAL INTERFACE UART0 (
PD178076, 178078, AND 178F098 ONLY)
User’s Manual U12790EJ2V0UD
(i)
Even parity
During transmission
The parity bit is set so that the number of bits in the transmit data, plus the parity bit, that are “1”
is even. The value of the parity bit is as follows.
If the number of bits in transmit data that are “1” is odd: 1
If the number of bits in transmit data that are “1” is even: 0
During reception
The number of bits in the receive data, including the parity bit, that are “1” are counted. If the
number of bits is odd, a parity error occurs.
(ii) Odd parity
During transmission
The parity bit is set so that the number of bits in the transmit data, plus the parity bit, that are “1”
is odd. The value of the parity bit is as follows.
If the number of bits in transmit data that are “1” is odd: 0
If the number of bits in transmit data that are “1” is even: 1
During reception
The number of bits in the receive data, including the parity bit, that are “1” are counted. If the
number of bits is even, a parity error occurs.
(iii) 0 parity
The parity bit is cleared to 0 during transmission, regardless of the transmit data.
The parity bit is not checked during reception. Therefore, a parity error does not occur regardless
of whether the parity bit is 0 or 1.
(iv) No parity
A parity bit is not appended to the transmit data.
During reception, data is received assuming that it has no parity bit. Because no parity bit is used,
parity errors do not occur.