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CHAPTER 13
SERIAL INTERFACE SIO0
User’s Manual U12790EJ2V0UD
Caution
When using SCK0, set P27 to 1. If P27 is set to 0, it always outputs a low level.
Notes 1. Bit 6 (COI) is a read-only bit.
2. Can be used freely as a port.
3. Be sure to set WUP to 0 in the 2-wire serial I/O mode.
4. When CSIE0 = 0, COI is 0.
Remark
×:
Don’t care
PM
××: Port mode register
P
××:
Output latch of port
<6>
<5>
4
3210
<7>
Symbol
CSIM0 CSIE0 COI
WUP CSIM04 CSIM03 CSIM02 CSIM01
0
CSIM01
0
Selection of serial interface SIO0 clock selection
Clock input to SCK0/SCL/P27 pin from off-chip
R/W
1
Clock specified by bits 0 to 3 of serial interface clock select register 0 (SCL0)
CSIM
04
0
FF61H
00H
R/WNote 1
Address
After reset
R/W
CSIM
03
CSIM
02
PM25 P25 PM26 P26 PM27 P27
Operating
mode
Start bit
SIO/SB0/SDA0/P25
pin function
SO0/SB1/SDA1/P26
pin function
SCK0/SCL/P27
pin function
×
10
WUP
0
1
Control of wakeup function
Interrupt request signal generated with each serial transfer in any mode
Setting prohibitedNote 3
R/W
2-wire serial
l/O mode
or
I2C bus mode
(Refer to
13.4.5)
0
1
11
×
0
×
0
×
0
×
0
1
Note 2 Note 2
MSB
P25
(CMOS I/O)
SB0/SDA0
(N-ch open-
drain I/O)
SB1/SDA1
(N-ch open-
drain I/O)
P26
(CMOS I/O)
3-wire serial I/O mode (refer to 13.4.2 3-wire serial I/O mode operation)
SBI mode (Refer to 13.4.3 SBI mode operation)
COI
0
Slave address comparison result flag Note 4
Slave address register 0 and serial I/O shift register 0 data do not match
Slave address register 0 and serial I/O shift register 0 data match
R
1
CSIE0
0
Control of serial interface SIO0 operation
Operation stopped
Operation enabled
R/W
1
SCK0/SCL
(N-ch open-
drain I/O)