
415
CHAPTER 17
IEBus CONTROLLER (
PD178096A, 178098A, 178F098 ONLY)
User’s Manual U12790EJ2V0UD
17.6.3 Slave transmission
Initial preparation processing:
Set a unit address, telegraph length, and the first byte of the transmit data.
Communication start processing:
Set the bus control register (enable communication, slave transmission, and slave reception).
Figure 17-31. Slave Transmission
<1> Interrupt (INTIE2) occurrence
Judgment of occurrence of error
→
Error processing
↓
Judgment of slave request
<2> Interrupt (INTIE2) occurrence
Judgment of occurrence of error
→
Error processing
↓
Judgment of end of communication
→
End of communication processing
↓
Judgment of end of frame
→
Frame end processing (See 17.6.3 (2) Frame end processing)
Remarks 1.
: Interrupt (INTIE1) occurrence (See 17.6.3 (1) Interrupt (INTIE1) occurrence).
The transmit data of the second and subsequent bytes are written to the IEBus data
register (DR) by software. At this time, the data transfer direction is RAM (memory)
→
SFR (peripheral).
2.
: An interrupt (INTIE1) does not occur.
3.
: An interrupt (INTIE2) occurs only when 0H, 4H, 5H, or 6H is received in the control field
in the slave status (for the slave status return operation in the locked state, refer to 17.4.2
(5) IEBus control data register (CDR)).
4. n = Final number of data bytes
Start
M address P
S address
P
A
Control
P
A
Data 1
PA
Data 1
Data 2
P
A
Data n
 1
A
Data n
P
PA
<1>
<2>
PA
Approx. 390 s
(mode 1)
Approx. 624
s (mode 1)
Broad-
cast
Telegraph
length