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型號(hào)：	UPD178F098GF-3BA-A
元件分類(lèi)：	微控制器/微處理器
英文描述：	8-BIT, FLASH, MICROCONTROLLER, PQFP100
封裝：	14 X 20 MM, PLASTIC, QFP-100
文件頁(yè)數(shù)：	192/559頁(yè)
文件大小：	3587K
代理商：	UPD178F098GF-3BA-A

CHAPTER 13

SERIAL INTERFACE SIO0

User’s Manual U12790EJ2V0UD

(1) I2C bus mode functions

In the I2C bus mode, the following functions are available.

(a) Automatic identification of serial data

Slave devices automatically detect and identify start condition, data, and stop condition signals sent via

the serial data bus.

(b) Chip selection by specifying device address

The master device can select a specific slave device connected to the I2C bus and communicate with

it by sending in advance the address data corresponding to the destination device.

(c) Wakeup function

When the received address matches the value of slave address register 0 (SVA0), the slave device

internally generates an interrupt signal (also generated when a stop condition is detected). Therefore,

CPUs other than the selected slave device on the I2C bus can perform independent operations during

serial communication.

(d) Acknowledge signal (ACK) control function

The master device and a slave device send and receive acknowledge signals to confirm that serial

communication has been executed normally.

(e) Wait signal (WAIT) control function

When a slave device is preparing for data transmission or reception and requires more waiting time, the

slave device outputs a wait signal on the bus to inform the master device of the wait status.

(2) I2C bus definition

This section describes the format of serial data communication and the functions of the signals used in the

I2C bus mode.

First, the transfer timing of the start condition, data, and stop condition signals, which are output onto the signal

data bus of the I2C bus, is shown in Figure 13-36.

Figure 13-36. I2C Bus Serial Data Transfer Timing

The start condition, slave address, and stop condition signals are output by the master. The acknowledge

signal (ACK) is output by either the master or the slave device (normally by the device which has received

the 8-bit data that was sent). A serial clock (SCL) is continuously supplied from the master device.

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
UPD178F124	制造商:未知廠家制造商全稱(chēng):未知廠家功能描述:78K/0 Series for Instructions \| User＇s Manual[10/2001]
UPD178F124GC8BT	制造商:未知廠家制造商全稱(chēng):未知廠家功能描述:Microcontroller
UPD178F124GF3B9	制造商:未知廠家制造商全稱(chēng):未知廠家功能描述:Microcontroller
UPD178P018	制造商:NEC 制造商全稱(chēng):NEC 功能描述:8-BIT SINGLE-CHIP MICROCONTROLLER
UPD178P018A	制造商:NEC 制造商全稱(chēng):NEC 功能描述:8-BIT SINGLE-CHIP MICROCONTROLLER

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