
PRELIMINARY
9
A
PCIset Overview
Historically, the 32 Kbyte region from C0000h–C7FFFh has contained the video BIOS located on a video card
in the ISA Expansion Area. However, in the high integration portable and desktop market video BIOS is more
likely to be located in the Extended System BIOS or System BIOS regions that start at E0000h.
The 96 Kbyte area from C8000h–DFFFFh has usually been made available to expand memory windows in
16 Kbyte blocks, depending on the requirements of other channel devices in the corresponding ISA space.
More recently, PCMCIA devices for the portable market have been assigned within this region.
This region could also be used as System Management Mode (SMM) memory.
Extended System BIOS
This 64 Kbyte region from E0000h–EFFFFh is divided into four 16 Kbyte blocks and may be mapped either to
the memory controller or the PCI bridge. This region can be programmed as disabled, read/write, write only, or
read only, providing the capability to shadow these regions in main memory. Typically, this area is used for RAM
or ROM.
System BIOS
The 64 Kbyte region from F0000h–FFFFFh is treated as a single block. After power-on reset, the PB (Compat-
ibility PB in an 450GX dual PB system) has this area R/W enabled to respond to fetches during system initial-
ization. The MC(s) and Auxiliary PBs (450GX PCIset) have this area R/W disabled. This region can be
programmed as disabled, read/write, write only, or read only, providing the capability to shadow these regions
in main memory.
4.2
Extended Memory (ISA)
The ISA Extended Memory region in Figure 4 covers 15 Mbytes ranging from 100000h–FFFFFFh. There are
three programmable ranges that may be mapped to the ISA Extended Memory region of the MC—the Low
Memory Gap range, the Memory Gap Range, and the High memory Gap Range. Memory in these ranges, that
would normally be “l(fā)ost”, is recovered by the MC by extending the effective top of system memory, if reclaiming
is enabled. The Memory Gap Range and High Memory Gap range are also programmable ranges in the PB.
The PB also has a programmable PCI Frame Buffer Range.
Low Memory Gap Range (MC Only)
The Low Memory Gap range can start on any 1 Mbyte boundary in the ISA or EISA Extended Memory region,
and can be 1, 2, 4, 8, 16, or 32 Mbytes. This region defines a “hole” in system DRAM space where accesses
can be directed to the PCI bus. The Low Memory Gap Range is used by ISA devices such as LAN or linear
frame buffers which are mapped into the ISA Extended region, or by any EISA or PCI device. The Low Memory
Gap Range must reside at the lowest address of the three memory gaps, if it is enabled.
PCI Frame Buffer Range (PB Only)
The PCI Frame Buffer range can start on any 1 Mbyte boundary in either the ISA Extended Memory region or
the EISA Extended Memory Region, and can be 1, 2, 4, 8, 16,or 32 Mbytes.