
PRELIMINARY
XRT86SH328
67
REV. P1.0.6
28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET APPLICATIONS
BIT [7:0] - VT-Mapper Block Channels [15:8]
These READ-ONLY bit-fields indicate whether or not the VT-Mapper block associated with Channels [15:8] have a
pending Interrupt Request.
`
0 - Indicates that the VT-Mapper block associated with Channel [15:8] does NOT have a pending interrupt request.
`
1 - Indicates that the VT-Mapper block associated with Channel [15:8] DOES have a pending interrupt request.
Bit[ 7:0] - VT-Mapper Block Channels [7:0]
These READ-ONLY bit-fields indicate whether or not the VT-Mapper block associated with Channels [7:0] have a
pending Interrupt Request.
`
0 - Indicates that the VT-Mapper block associated with Channel [7:0] does NOT have a pending interrupt request.
`
1 - Indicates that the VT-Mapper block associated with Channel [7:0] DOES have a pending interrupt request.
2.2
LIU COMMON CONTROL REGISTERS
BIT 7 - Reserved:
BIT 6 - ATAOS: Automatic Transmit All Ones Upon RLOS Condition
If ATAOS is selected, an all ones pattern will be transmitted on any channel that experiences an RLOS condition. If an
RLOS condition does not occur, TAOS will remain inactive.
0 = Disabled
1 = Enabled
Bits [5:2] - Reserved:
BIT 1 - TCLKCNTL
If TCLKCNTL is selected, and if the transmit clock to the DS-1 framer is missing, Low, or High, then the transmitter
outputs to the line interface will send an All Ones Signal.
0 = Disabled
T
ABLE
63: C
HANNEL
I
NTERRUPT
I
NDICATION
R
EGISTER
- VT-M
APPER
B
LOCK
- B
YTE
3 (A
DDRESS
= 0
X
005E)
BIT7
BIT6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
VT-Mapper
Channel 15
VT-Mapper
Channel 14
VT-Mapper
Channel 13
VT-Mapper
Channel 12
VT-Mapper
Channel 11
VT-Mapper
Channel 10
VT-Mapper
Channel 9
VT-Mapper
Channel 8
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
0
0
0
0
0
0
0
0
T
ABLE
64: C
HANNEL
I
NTERRUPT
I
NDICATION
R
EGISTER
- VT-M
APPER
B
LOCK
- B
YTE
3 (A
DDRESS
= 0
X
005F)
BIT7
BIT6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
VT-Mapper
Channel 7
VT-Mapper
Channel 6
VT-Mapper
Channel 5
VT-Mapper
Channel 4
VT-Mapper
Channel 3
VT-Mapper
Channel 2
VT-Mapper
Channel 1
VT-Mapper
Channel 0
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
0
0
0
0
0
0
0
0
T
ABLE
65: LIU C
OMMON
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
0100)
BIT7
BIT6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Reserved
ATAOS
Reserved
TCLKCNTL
LIU Soft-
ware RESET
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0