
XRT86SH328
PRELIMINARY
302
28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET APPLICATIONS
REV. P1.0.6
BIT 7 - Receive (Ingress Direction) DS1/E1 AIS Defect Declared:
This READ/WRITE bit-field indicates whether or not the corresponding DS1 or E1 signal (that is being handled by this
Transmit VT-Mapper block) is transporting the AIS indicator.
`
0 - Indicates that the Ingress Direction DS1 or E1 signal is NOT currently transporting the AIS indicator.
`
1 - Indicates that the Ingress Direction DS1 or E1 signal is currently transporting the AIS indicator.
BIT 6 - Unused
BIT 5 - BIP-2 Error Insert
This READ/WRITE bit-field is used to configure the corresponding VT-Mapper block to transmit VTs with erred BIP-2
bits into the "Ingress Direction VT-data-stream (towards the Transmit STS-1/STS-3 POH Processor block). If the user
opts to invoke this feature, then the VT-Mapper block will automatically invert the value of the "locally-computed" BIP-2
bits (within each outbound VT), prior to transmitting this data to the Transmit STS-1/STS-3 POH Processor block.
`
0 - Configures the Transmit VT-Mapper block to NOT transmit VTs with erred BIP-2 bits to downstream circuitry
(normal operation).
`
1 - Configures the Transmit VT-Mapper block to transmit VTs with erred BIP-2 bits to downstream circuitry(normal
operation).
N
OTE
:
For normal operation, the user should set this bit-field to 0.
BIT [4:2] - VT Label[2:0]:
These three (3) READ/WRITE bit-fields are used to set the VT Label bit-fields (within each outbound V5 byte) the value
of the users choice.
BIT 1 - Auto Transmit RFI-V Indicator
This READ/WRITE bit-field is used to select the source of the RFI-V bit-field, within the V5 byte of the outbound
VT1.5/VT2 traffic. In this case, the user has the following two options.
a.
The user can configure the VT-Mapper block to use an on-chip register as the source of the RFI-V bit-fields
(within the V5 byte). More specifically, the VT-Mapper block will read out the contents within Bit 7 (Transmit
RFI-V Value) within the "VT-Mapper Block - Ingress Direction - DS1/E1 Insertion Control Register (Address =
0xND43)" and it will load this value into RFI-V bit-field position within each outbound VT. In this case, the user
will have Software Control over the state of the RFI-V bit-field, within the V5 byte of the outbound VT traffic) or
b.
The Transmit VT-Mapper block will set the RFI-V bit-fields to the appropriate value, based upon any defect
conditions that are currently being declared by the corresponding VT-De-Mapper block.
`
0 - Configures the Transmit VT-Mapper Block to use the on-chip register as the source of the RFI-V bit-field.
10
Do Not Use
11
Receive Status per the corresponding Receive VT-Mapper Block
T
ABLE
438: C
HANNEL
C
ONTROL
- VT-M
APPER
B
LOCK
- I
NGRESS
D
IRECTION
- DS1/E1 I
NSERTION
C
ONTROL
R
EGISTER
- 1 (A
DDRESS
= 0
X
ND42,
WHERE
N
RANGES
FROM
0
X
01
TO
0
X
1C)
BIT7
BIT6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Ingress
Direction
DS1/E1 AIS
Defect
Declared
Unused
BIP-2 Error
Insert
VT Signal Label[2:0]
Auto
Transmit
RFI-V
Indicator
Auto
Transmit
RDI-V
Indicator
R/O
R/O
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
Transmit RDI-V Source
T
RANSMIT
RDI-V
S
OURCE
[1:0]
R
ESULTING
S
OURCE
OF
B
ITS
5, 6
AND
7
OF
K4 B
YTE