
PRELIMINARY
XRT86SH328
249
REV. P1.0.6
28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET APPLICATIONS
BIT [7:4] - Unused:
BIT 3 - Auto DS1/E1 AIS upon DS2 LOF Defect:
This READ/WRITE bit-field is used to configure all of the Egress Direction Transmit DS1/E1 Framer blocks (associated
with a given M12 De-MUX block) to automatically transmit the DS1/E1 AIS indicator via each of its three or four down-
stream DS1/E1 signals, anytime (and for the duration that) the corresponding M12 De-MUX block declares the DS2
LOF defect condition.
`
0 - Does not configure each of the M12 De-MUX blocks to force all of its corresponding Egress Direction Transmit
DS1/E1 Framer blocks (within the XRT86SH328) to automatically transmit the DS1/E1 AIS indicator via its downstream
DS1/E1 signals, anytime (and for the duration that) the M12 De-MUX block declares the DS2 LOF defect condition.
`
1 - Configures each of the M12 De-MUX blocks to force all of its corresponding Egress Direction Transmit DS1/E1
Framer blocks (within the XRT86SH328) to automatically transmit the DS1/E1 AIS indicator via its downstream DS1/E1
signals, anytime (and for the duration that) the M12 De-MUX block declares the DS2 LOF defect condition.
N
OTE
:
This bit-setting applies to each of the seven (7) M12 De-MUX blocks within the XRT86SH328.
BIT 2 - Unused:
BIT 1 - Auto DS1/E1 AIS upon DS2 AIS Defect:
This READ/WRITE bit-field is used to configure all of the Egress Direction Transmit DS1/E1 Framer blocks (associated
with a given M12 De-MUX block) to automatically transmit the DS1/E1 AIS indicator via each of its three or four down-
stream DS1/E1 signals, anytime (and for the duration that) the corresponding M12 De-MUX block declares the DS2 AIS
defect condition.
`
0 - Does not configure each of the M12 De-MUX blocks to force all of its corresponding Egress Direction Transmit
DS1/E1 Framer blocks (within the XRT86SH328) to automatically transmit the DS1/E1 AIS indicator via its downstream
DS1/E1 signals, anytime (and for the duration that) the M12 De-MUX block declares the DS2 AIS defect condition.
`
1 - Configures each of the M12 De-MUX blocks to force all of its corresponding Egress Direction Transmit DS1/E1
Framer blocks (within the XRT86SH328) to automatically transmit the DS1/E1 AIS indicator via its downstream DS1/E1
signals, anytime (and for the duration that) the M12 De-MUX block declares the DS2 AIS defect condition.
N
OTE
:
This bit-setting applies to each of the seven (7) M12 De-MUX blocks within the XRT86SH328328.
BIT 0 - Unused:
2.12
(N ranges from 0x01 to 0x1C)
T1/E1 LIU CHANNEL CONTROL REGISTERS
BIT7 - PRBS/QRSS:
These bits are used to select between QRSS and PRBS. To send the a QRSS or PRBS pattern, the TxTEST[2:0] bits
in register 0xN002h must be programmed.
T
ABLE
373: DS3 F
RAMER
B
LOCK
- M13 D
E
-MUX R
EGISTER
(A
DDRESS
= 0
X
0EB8)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
Unused
Auto DS1/E1
AIS upon
DS2 OOF
Defect
Unused
Auto DS1/E1
AIS upon
DS2 AIS
Defect
Unused
R/O
R/O
R/O
R/O
R/W
R/O
R/W
R/O
0
0
0
0
0
0
0
0
T
ABLE
374: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N000)
BIT7
BIT6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
PRBS/QRSS
PRBS_Rx_Tx
RXON
EQC[4:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0