
PRELIMINARY
XRT86SH328
255
REV. P1.0.6
28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET APPLICATIONS
`
1 = Change in status occurred
BIT 0 - Quasi Random Pattern Detection Interrupt Enable:
`
0 = No change
`
1 = Change in status occurred
BIT7 - Enable ROM for LCV Counter:
This bit is used to enable data from an internal LCV counter to be read back.
`
0 = Disabled.
`
1 = Enabled.
BIT [6:5] - Reserved:
BIT 4 - Reset All Internal LCV Counters:
This bit is used to reset all 28 Internal LCV counters to their default state 0000h. This bit must be set High for a minimum
of 1mS.
`
0 = Normal Operation
`
1 = Resets All LCV Counters
BIT 3 - Update All LCV Counters:
This bit is used to latch the contents of all 28 internal LCV counters so that the values can be read. When the HI/LO bit
is set Low, initiating this update bit places the lower 8 bits of the 16-bit word in register 0xN011h. When the HI/LO bit is
set High, initiating this update bit places the upper 8 bits of the 16-bit word in register 0xN010h.
`
0 = Normal Operation
`
1 = Updates All LCV Counters
BIT 2 - High Byte / Low Byte Select:
This bit is used to select which byte of the 16-bit LCV value will be placed in the read back registers.
`
0 = Lower Byte LCV[7:0]
`
1 = Upper Byte LCV[15:8]
BIT 1 - Update LCV Counter:
This bit is used to latch the contents of the internal LCV counter for this channel so that the value can be read. When
the HI/LO bit is set Low, initiating this update bit places the lower 8 bits of the 16-bit word in register 0xN011h. When
the HI/LO bit is set High, initiating this update bit places the upper 8 bits of the 16-bit word in register 0xN010h.
`
0 = Normal Operation
`
1 = Update LCV Counter
BIT 0 - Reset Internal LCV Counter:
This bit is used to reset the Internal LCV for this channel to its default state 0000h. This bit must be set High for a
minimum of 1mS.
`
0 = Normal Operation
`
1 = Reset LCV Counter
T
ABLE
381: LIU C
HANNEL
C
ONTROL
R
EGISTER
0 (A
DDRESS
= 0
X
N007)
BIT7
BIT6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
ENROM
Reserved
Reserved
RSTALL
UPDATEALL
HI/LO
UPDATE
RST
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0