
XRT86SH328
PRELIMINARY
222
28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET APPLICATIONS
REV. P1.0.6
BIT [7:0] - PMON EXZ_Event_Count[7:0]:
These RESET-upon-READ bits, along with that within the PMON Excessive Zero Count Register -MSB combine to
reflect the cumulative number of instances in which the Receive DS3 Framer block has detected a string of three or
more consecutive zeros within the incoming DS3 data-stream, since the last read of this register.
This register contains the Least Significant Byte of this 16-bit expression.
BIT [7:0] - PMON LCV_Event_Count[15:8]:
These RESET-upon-READ bits along with that within the PMON Line Code Violation Count - LSB register combine to
reflect the cumulative number of Line Code Violation events that the Receive DS3 Framer block has detected within the
incoming DS3 data-stream, since the last read of this register.
This register contains the Most Significant byte of this 16-bit expression.
BIT [7:0] - PMON LCV_Event_Count[7:0]:
These RESET-upon-READ bits along with that within the PMON Line Code Violation Count - MSB register combine to
reflect the cumulative number of Line Code Violation events that the Receive DS3 Framer block has detected within the
incoming DS3 data-stream, since the last read of this register.
This register contains the Least Significant byte of this 16-bit expression.
T
ABLE
299: DS3 F
RAMER
B
LOCK
- PMON E
XCESSIVE
Z
ERO
(EXZ) E
VENT
C
OUNT
R
EGISTER
- LSB (A
DDRESS
=
0
X
0E4F)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
PMON EXZ Event Count[7:0]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
T
ABLE
300: DS3 F
RAMER
B
LOCK
- PMON L
INE
C
ODE
V
IOLATION
(LCV) E
VENT
C
OUNT
R
EGISTER
- MSB
(A
DDRESS
= 0
X
0E50)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
PMON LCV Event Count[15:8]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
T
ABLE
301: DS3 F
RAMER
B
LOCK
- PMON L
INE
C
ODE
V
IOLATION
(LCV) E
VENT
C
OUNT
R
EGISTER
- LSB
(A
DDRESS
= 0
X
0E51)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
PMON LCV Event Count[7:0]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0
T
ABLE
302: DS3 F
RAMER
B
LOCK
- PMON F
RAMING
B
IT
E
RROR
C
OUNT
R
EGISTER
- MSB (A
DDRESS
= 0
X
0E52)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
PMON_Framing_Bit_Error_Count[15:8]
RUR
RUR
RUR
RUR
RUR
RUR
RUR
RUR
0
0
0
0
0
0
0
0