
PRELIMINARY
XRT86SH328
295
REV. P1.0.6
28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET APPLICATIONS
BIT7 - Transmit LOS Pattern:
This READ/WRITE bit-field configures the Transmit E1 Framer block to generate and transmit the LOS Pattern to the
remote terminal.
`
0 = Configures the Transmit E1 Framer Block to transmit normal E1 traffic
`
1 = Configures the Transmit E1 Framer Block to transmit the LOS pattern.
N
OTE
:
The user MUST set this bit-field to 0 for Normal Operation.
BIT6 - Reserved
BIT [5:4] - Framer Loop-back[1:0]:
These two READ/WRITE bit-fields are used to configure the Transmit/Receive E1 Framer blocks to operate in a variety
of possible loop-back modes, as depicted in the Table below.
The Relationship between the Clock Source Select[1:0] bit-fields and the resulting timing source for
the Transmit E1 Framer block, within this particular Channel
C
LOCK
S
OURCE
S
ELECT
[1:0]
T
IMING
S
OURCE
FOR
T
RANSMIT
E1 F
RAMER
B
LOCK
00
Loop-Timing Mode:The Transmit E1 Framer block will derive its timing from the Received
or Recovered Clock signal within the corresponding Receive E1 Framer block
N
OTE
:
This timing option is only available if the user has configured the XRT86SH328 to
operate in the 21-Channel E1 Framer/LIU Combo Mode
01
Local-Timing Mode (TxE1CLK_n Input)The Transmit E1 Framer block will either use up-
stream timing or the TxE1CLK_n input as its timing source.
N
OTE
:
For Aggregation Applications, the user MUST configure all active T1/E1 Framer
blocks to operate in this timing mode.
10
Local-Timing Mode (MCLK PLL Input)The Transmit E1 Framer block will derive its timing
from the MCLK PLL.NOTE: This timing option is only available if the user has configured
the XRT86SH328 to operate in the 21-Channel E1 Framer/LIU Combo Mode.
11
Loop-Timing ModeThe Transmit E1 Framer block will derive its timing from the Received
or Recovered Clock signal within the corresponding Receive E1 Framer block
N
OTE
:
This timing option is only available if the user has configured the XRT86SH328 to
operate in the 21-Channel E1 Framer/LIU Combo Mode.
T
ABLE
433: E1 F
RAMER
B
LOCK
- L
INE
I
NTERFACE
C
ONTROL
R
EGISTER
(A
DDRESS
= 0
X
N101,
WHERE
N
RANGES
IN
VALUE
FROM
0
X
01
TO
0
X
38)
BIT7
BIT6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Transmit
LOS Pattern
Reserved
Framer
Loop-
Back[1:0]
Reserved
R/W
R/O
R/W
R/W
R/O
R/O
R/O
R/O
0
1
0
0
0
0
0
0
Relationship between the Framer Loop-back[1:0] bit-fields and the Corresponding Loop-Back Mode
within the E1 Framer block
F
RAMER
L
OOP
-
BACK
[1:0]
R
ESULTING
L
OOP
-B
ACK
M
ODE
(
WITHIN
F
RAMER
B
LOCK
)
00
Normal Operation (No Loop-back) Mode
01
Local Loop-back Mode