
XRT86SH328
PRELIMINARY
202
28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET APPLICATIONS
REV. P1.0.6
Figure 15
presents an illustration of the Functional Block diagram of the XRT86SH328, whenever a given M12
De-MUX block has been configured to transmit the DS1/E1 AIS indicator (within a given DS1/E1 signal) in the
Egress Direction.
N
OTE
:
For normal operation, the user MUST set this bit-field to 0.
BIT6 - Force Receive DS1/E1 AIS - DS1/E1 Channel 3
See Description of BIT7.
BIT 5 - Force Receive DS1/E1 AIS - DS1/E1 Channel 2
See Description of BIT7.
BIT 4 - Force Receive DS1/E1 AIS - DS1/E1 Channel 1
See Description of BIT7.
BIT 3 - Force Transmit DS1/E1 AIS - DS1/E1 Channel 4
This READ/WRITE bit-field is used to force the M12 MUX Block (associated with DS2 Channel # 0) to overwrite the
Ingress Direction DS1/E1 Signal (associated with DS1/E1 Channel 4, with a DS1/E1 AIS Pattern. If the user invoke this
feature, then the M12 MUX Block will transmit a DS1/E1 AIS pattern (within DS1/E1 Channel 4) towards the M23 MUX
Block.
`
0 - Configures the M12 MUX Block to NOT transmit the DS1/E1 AIS Pattern, via the Ingress Direction DS1/E1
Channel 3.
`
1 - Configures the M12 MUX Block to transmit the DS1/E1 AIS Pattern, via the Ingress Direction DS1/E1 Channel 3.
N
OTE
:
For normal operation, the user MUST set this bit-field to 0.
BIT 2 - Force Transmit DS1/E1 AIS - DS1/E1 Channel 3
See description of BIT 3.
BIT 1 - Force Transmit DS1/E1 AIS - DS1/E1 Channel 2
F
IGURE
15. A
N
I
LLUSTRATION
OF
THE
F
UNCTIONAL
B
LOCK
DIAGRAM
OF
THE
XRT86SH328,
WHENEVER
A
GIVEN
M12 D
E
-MUX
BLOCK
HAS
BEEN
CONFIGURED
TO
TRANSMIT
THE
DS1/E1 AIS
INDICATOR
(
WITHIN
A
GIVEN
DS1/E1
SIGNAL
)
IN
THE
E
GRESS
D
IRECTION
STS-1/
STS-3
Telecom
Bus
Interface
Transmit
STS-1/3
TOH
Processor
Block
Receive
STS-1/3
TOH
Processor
Block
Transmit
STS-1 POH
Processor
Block
Receive
STS-1 POH
Processor
Block
VT/TU
De-Mapper
Block
Receive
DS3
Framer
Block
Transmit
DS3
Framer
Block
M23
MUX
Block
M23
De-MUX
Block
Ingress
Direction
Receive
DS1/E1
Framer
Block
Egress
Direction
Receive
DS1/E1
Framer
Block
Ingress
Direction
Transmit
DS1/E1
Framer
Block
Egress
Direction
Transmit
DS1/E1
Framer
Block
Receive
DS1/E1
LIU
Block
Transmit
DS1/E1
LIU
Block
DS3/
STS-1
LIU
Interface
M12
MUX
Block
M12
De-MUX
Block
DS1/E1
Jitter
Atten
Block
DS1/E1 Channel 0
DS1/E1 Channel 0
DS2 Channel 0
From DS1/E1 Channels 1 - 27
From DS2 Channels 1 - 6
To DS2 Channels 1 - 6
From DS1/E1 Channels 1 - 3
To DS1/E1 Channels 1 - 3
To DS1/E1
Channels 1 - 27
VT/TU
Mapper
Block
DS2 Channel 0
DS1/E1 AIS in Egress
Direction