
PRELIMINARY
XRT86SH328
49
REV. P1.0.6
28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET APPLICATIONS
to be enabled in order to enable that particular interrupt
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.0 - Disable all Operation Control Block interrupts within the device.
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1 - Enables the Operation Control Block at the Block-Level for interrupt generation
BIT 6 - DS3 Mapper Block Interrupt Enable
This READ/WRITE bit is used to either enable or disable the DS3 Mapper Block for interrupt generation. If a 0 is written
to this register bit and if the DS3 Mapper Block (for interrupt generation) is disabled, then all DS3 Mapper Block
interrupts will be disabled for interrupt generation.
If a 1is written to this register bit, the individual DS3 Mapper Block interrupt(s) at the Source Levelwill still need to be
enabled in order to enable that particular interrupt.
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0 - Disable all DS3 Mapper Block interrupts within the device.
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1 - Enables the DS3 Mapper Block interrupts at the Block-Level
BIT 5 - VT Mapper Block Interrupt Enable
This READ/WRITE bit-field is used to either enable or disable the VT-Mapper Block for interrupt generation. If the user
writes a 0 into this register bit and disables the VT Mapper Block (for interrupt generation) then all VT-Mapper Block
interrupts will be disabled for interrupt generation.
If the user writes a 1 into this register bit, the user will still need to enable the individual VT-Mapper Block Interrupt(s)
at the Source Level in order to enable that particular interrupt.
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0 - Disables all VT Mapper Block Interrupts within the device.
`
1 - Enables the VT Mapper Block Interrupts at the Block-Level
BIT 4- DS1/E1 Framer/LIU Block (VT Side) Interrupt Enable
This READ/WRITE bit is used to either enable or disable the DS1/E1 Framer/LIU Block (on the VT Side) for interrupt
generation.
If the user writes a 0 to this register bit and disables the DS1/E1 Framer/LIU Block (on the VT Side) for interrupt
generation, then all DS1/E1 Framer/LIU Block interrupts will be disabled for interrupt generation.
If the user writes a 1 to this register bit, the user will still need to enable the individual DS1/E1 Framer/LIU Block
interrupt(s) at the Source Level in order to enable that particular interrupt.
`
0 - Disable all DS1/E1 Framer/LIU Block interrupts within the device.
`
1 - Enables the DS1/E1 Framer/LIU Block at the Block-Level.
BIT 3 - DS1/E1 Framer/LIU Block (M13 Side) Interrupt Enable
This READ/WRITE bit is used to either enable or disable the DS1/E1 Framer/LIU Block (on the M13 Side) for interrupt
generation.
If the user writes a 0 to this register bit and disables the DS1/E1 Framer/LIU Block (for interrupt generation), then all
DS1/E1 Framer/LIU Block interrupts will be disabled for interrupt generation.
If the user writes a 1 to this register bit, the user will still need to enable the individual DS1/E1 Framer/LIU Block
interrupt(s) at the Source Level in order to enable that particular interrupt.
`
0 - Disable all DS1/E1 Framer/LIU Block interrupts within the device,
`
1 - Enables the DS1/E1 Framer/LIU Block interrupts at the Block-Level.
BIT 2 - DS3 Framer Block Interrupt Enable
This READ/WRITE bit is used to either enable or disable the DS3 Framer Block for interrupt generation.
If the user writes a 0 to this register bit and disables the DS3 Framer Block (for interrupt generation), then all DS3
Framer Block interrupts will be disabled for interrupt generation. If the user writes a 1 to this register bit, the user will
still need to enable the individual DS3 Framer Block interrupt(s) at the Source Level in order to enable that particular
interrupt.
`
0 - Disable all DS3 Framer Block interrupts within the device.
`
1 - Enables the DS3 Framer Block at the Block-Level.
BIT [1:0] - Unused