參數(shù)資料
型號(hào): CD1284
廠商: Intel Corp.
英文描述: IEEE 1284-Compatible Parallel Interface Controller with Two High-Speed Asynchronous Serial Ports
中文描述: 符合IEEE 1284兼容并行接口控制器兩個(gè)高速異步串行端口
文件頁數(shù): 132/176頁
文件大?。?/td> 2255K
代理商: CD1284
CD1284
IEEE 1284-Compatible Parallel Interface Controller
132
Datasheet
7.5.7
Received Data Count Register
The RDCR indicates the number of good characters currently in the serial received data FIFO. Host
software can use this value as a loop counter when taking characters out of the FIFO. The value in
this register is only valid during the context of a service request acknowledge. At other times, it
may or may not give a true indication of the number of characters in the FIFO.
1
0
1
Not used.
1
1
0
1
1
1
Register Name: RDCR
Register Description: Received Data Count
Access: Read only
Bit 7
Bit 6
0
0
8-Bit Hex Address: 0E
Default Value: 00
Bit 5
0
Bit 4
0
Bit 3
CT3
Bit 2
CT2
Bit 1
CT1
Bit 0
CT0
ClkSel2
ClkSel1
ClkSel0
Clock Selected
Bit
Description
7:4
These bits must always be
0
.
3:0
Character Count 3:0:
The encoding for these bits is:
CT3
CT2
CT1
CT0
Number of characters in FIFO
0
0
0
0
Not used.
0
0
0
1
1 character
0
0
1
0
2 characters
1
0
1
1
11 characters
1
1
0
0
12 characters
1
1
0
1
Not used.
1
1
1
0
1
1
1
1
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