參數(shù)資料
型號(hào): CD1284
廠商: Intel Corp.
英文描述: IEEE 1284-Compatible Parallel Interface Controller with Two High-Speed Asynchronous Serial Ports
中文描述: 符合IEEE 1284兼容并行接口控制器兩個(gè)高速異步串行端口
文件頁數(shù): 131/176頁
文件大?。?/td> 2255K
代理商: CD1284
IEEE 1284-Compatible Parallel Interface Controller
CD1284
Datasheet
131
7.5.4
Modem Signal Value Register 2
MSVR1 and MSVR2 provide information regarding the state of the modem input pins (DSR*,
CTS*, RI*, and CD*) and allows control of the modem output pins (DTR* and RTS*). A write to
any of the input bits has no effect. With the exception of the least-significant two bits, the registers
reflect identical data. The two are provided as a convenience for control of the modem output pins.
It is not necessary for host software to keep a copy of the current state of either when controlling
the other. The actual signal level on the output is the inverse of the value placed in this register. For
example, setting the DTR bit causes the DTR output to become active-low. The state of the modem
input pins is also the inverse of the value in the corresponding bit in the registers.
7.5.5
Receive Baud Rate Period Register
This register holds the baud rate divisor for the receiver. It is used in conjunction with the RCOR.
This provides the clock, which is divided by this value. The time period produced must equal the
value for one bit time of the receive data.
7.5.6
Receive Clock Option Register
The RCOR selects the clock source, which drives the RBPR. The value in ClkSel2
ClkSel0 selects
one of five possible clocks generated from the master clock (CLK).
Register Name: MSVR2
Register Description: Modem Signal Value Register 2
Access: Read/Write
Bit 7
Bit 6
DSR
CTS
8-Bit Hex Address: 6D
Default Value: XX
Bit 5
RI
Bit 4
CD
Bit 3
0
Bit 2
0
Bit 1
DTR
Bit 0
0
Register Name: RBPR
Register Description: Receive Baud Rate Period
Access: Read/Write
Bit 7
Bit 6
8-Bit Hex Address: 78
Default Value: 41
Bit 5
Bit 4
Binary Divisor Value
Bit 3
Bit 2
Bit 1
Bit 0
Register Name: RCOR
Register Description: Receive Clock Option
Access: Read/Write
Bit 7
Bit 6
X
X
8-Bit Hex Address: 7C
Default Value: 01
Bit 5
X
Bit 4
X
Bit 3
X
Bit 2
ClkSel2
Bit 1
ClkSel1
Bit 0
ClkSel0
ClkSel2
ClkSel1
ClkSel0
Clock Selected
0
0
0
Clk0 (CLK
÷
8)
0
0
1
Clk1 (CLK
÷
32)
0
1
0
Clk2 (CLK
÷
128)
0
1
1
Clk3 (CLK
÷
512)
1
0
0
Clk4 (CLK
÷
2048)
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