參數(shù)資料
型號(hào)： CD1284
廠商： Intel Corp.
英文描述： IEEE 1284-Compatible Parallel Interface Controller with Two High-Speed Asynchronous Serial Ports
中文描述： 符合IEEE 1284兼容并行接口控制器兩個(gè)高速異步串行端口
文件頁數(shù)： 1/176頁
文件大?。?/td> 2255K
代理商： CD1284
CD1284
IEEE 1284-Compatible Parallel Interface Controller
with Two High-Speed Asynchronous Serial Ports
Datasheet
Product Features
Parallel Port (Peripheral-side)
High-speed, bidirectional, multi-protocol
parallel port:
I
Hardware implementation of all modes of
the IEEE STD (Standard) 1284
specification (including automatic
negotiation)
—Centronics
-compatible mode
—Reverse Byte mode
—Reverse Nibble mode
—ECP (extended capabilities port) mode
with run-length encoding/decoding
—EPP (enhanced parallel port) mode
—Up to 2-Mbytes/sec. transfer rate in ECP
and EPP modes
I
64-byte parallel FIFO with DMA interface
Two Serial UARTs
I
Serial channel asynchronous protocol
support to 115.2 kbps (register-set-
compatible and functionally identical to
CD1400)
—Twelve-byte FIFOs for each transmitter
and receiver with programmable
threshold for receive FIFO interrupt
generation
—Improved interrupt schemes: Good
Data
interrupts eliminate the need for
character status check
—User-programmable and automatic flow
control for serial channels
—Special character recognition and
generation.
—Special character processing,
particularly useful for UNIX
environments, optionally handled
automatically by the serial channels.
—Six modem control signals per channel
(DTR, DSR, RTS, CTS, CD, and RI)
As of May 2001, this document replaces the Basis
Communications Corp. document.
CL-CD1284 — IEEE 1284-Compatible Parallel Interface Controller
May 2001
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