參數(shù)資料
型號: T7230A
廠商: Lineage Power
元件分類: 通信及網(wǎng)絡
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 71/110頁
文件大?。?/td> 752K
代理商: T7230A
Preliminary Data Sheet
June 1997
T7230A Primary Access Framer/Controller
67
Lucent Technologies Inc.
Microprocessor Interface
T7230A is equipped with an asynchronous microprocessor interface that allows register access through a 7-bit
wide address bus that is demultiplexed from a 8-bit wide data bus.
The minimum read and write register access time for the T7230A is specified at 200 ns.
The Intel interface mode consists of an chip select (CS), separate read (RD) and write (WR) pins, and a ready pin
1
(RDY). Supplying the appropriate signal to the MPCK input allows the use of the Intel-RDY signal to signify the
completion of the read or write access. System applications that do not use the Intel-RDY output signal should
strap the MPCK input to ground (0 V).
The Motorola interface mode consists of an address strobe (AS) pin, a data strobe (DS) pin, a read/write (R/W) pin,
and data transfer acknowledge
2
(DTACK) pin. The Motorola DTACK signal is an asynchronous signal that is a func-
tion the AS, DS, and R/W signals.
The read-cycle and write-cycle timing for these two modes is illustrated in Figure 19 and Figure 20, respectively.
1. If the setup and hold timing requirements of the CS, RD, and WR signals are met, then the ready signal may be ignored.
2. The DTACK signal is asynchronous to the MPCK signal.
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相關代理商/技術參數(shù)
參數(shù)描述
T-7230A--ML 制造商:Rochester Electronics LLC 功能描述:- Bulk
T7230-ML3 制造商:AGERE 功能描述:
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T7-231A2 制造商:OTTO Engineering Inc 功能描述:2POLE, SOLDER, STD,
T7-231A2D 功能描述:撥動開關 ON NONE OFF 2 Pole Standard LeverLock RoHS:否 制造商:OTTO 觸點形式: 開關功能: 電流額定值: 電壓額定值 AC: 電壓額定值 DC: 功率額定值: 端接類型: 安裝風格: 端子密封: 觸點電鍍: 照明: