
Preliminary Data Sheet
June 1997
T7230A Primary Access Framer/Controller
51
Lucent Technologies Inc.
Alarms and Performance Monitoring
The T7230A receive framer monitors the receive line data for alarm conditions and error events and presents this
information to the system through the microprocessor interface status registers. The transmit framer, to a lesser
degree, monitors the receive system data and presents the information to the system through the microprocessor
interface status registers. The updating of the status registers is controlled by the receive line clock signal. When
the T7230A determines that the RLCK signal is lost, the updating of all status information is clocked by the internal
system clock derived from the CHI CLKXR signal.
Although the precise method of detecting or generating alarm and error signals differs between framing modes, the
functions are essentially the same. The alarm conditions monitored on the received line interface are:
1.
Loss of frame alignment
. The loss of frame alignment (LFA) indicates that the receive frame alignment for the
line has been lost and the data cannot be properly extracted. The LFA for the various framing formats as
defined in Table 24.
2.
Yellow alarm
or the
remote frame alarm
. The T7230A detects an incoming remote frame alarm (commonly
referred to as a yellow alarm) as for the different framing formats is shown in Table 25.
Table 24. Loss of Frame Alignment Alarm Conditions
Framing Format
Activation Criteria
Superframe: D4
Superframe: SLC-96
Superframe: DDS
Extended Superframe (ESF)
CEPT
Two incorrect received framing bits out of four (or six).
Two incorrect received F
T
framing bits out of four.
Four incorrect received framing bits out of 12.
Two incorrect received F
E
framing bits out of four (or six).
Three consecutive incorrect FAS patterns or three consecutive incorrect
NOT FAS patterns or more than 914 received CRC-4 checksum errors.
Table 25. Remote Frame Alarm Conditions
Framing Format
Activation Criteria
Superframe: D4
Superframe: D4-Japanese
Superframe: DDS
Extended Superframe (ESF)
CEPT: Basic Frame
CEPT: Signaling Multiframe
Bit 2 of all time slots in the 0 state.
The twelfth framing bit in the 1 state.
Bit 6 of time slot 24 in the 0 state.
An alternating pattern of eight 1s followed by eight 0s.
Bit 3 of the NOT FAS frame in the 1 state.
Bit 6 of the time slot 16 signaling frame 0.