參數(shù)資料
型號(hào): T7230A
廠商: Lineage Power
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁(yè)數(shù): 36/110頁(yè)
文件大?。?/td> 752K
代理商: T7230A
Preliminary Data Sheet
T7230A Primary Access Framer/Controller
June 1997
32
Lucent Technologies Inc.
Frame Formats
(continued)
T1 Robbed-Bit Signaling
Robbed-bit signaling, used in ESF and SF framing formats, “robs” the eighth bit of the voice channels of every sixth
frame. The signaling bits are designated A, B, C, and D, depending on the signaling format used. The robbed bit
signaling format is defined by programming the state of the F and G bits in the transmitted signaling registers. In
the associated signaling mode, the T7230A can be programmed to use either the F and G bits obtained from the
system interface, i.e., the concentration highway interface or from the F and G bits in the transmitted signaling reg-
isters.
The received channels robbed-bit signaling format is defined by the corresponding transmit signaling F and G bits.
The robbed-bit signaling format for each of the 24 T1 channels is programmed on a per-channel basis by setting
the F and G bits in the transmit signaling direction.
SLC-96 9-State Signaling
The SLC-96 9-state signaling format is enabled by setting both the F and G bits in the signaling registers to the 0
state. In this state, A and B signaling bits can either be 0 or 1 or toggling. The transmitted A (B) signaling bit to the
line interface can be made to toggle by writing A = 0 and C = 1 (B = 0 and D = 1) in the transmit signaling register.
Writing A = C = 0 (B = D = 0) in the transmit signaling registers forces the signaling state A = 0 (B = 0) to be trans-
mitted to the line interface. Writing A = 1 (B = 1) in the transmit signaling registers forces A = 1 (B = 1) to be trans-
mitted to the line interface. Table 17 shows the state of the transmitted A and B bits to the line as a function of the A
and B bit settings in the transmit signaling registers.
Table 16. Robbed-Bit Signaling Options
G
F
Robbed-Bit Signaling Format
Frame
6
A
A
12
B
B
18
C
A
24
D
B
0
0
1
1
0
1
0
1
16-State
4-State
Data channel (no signaling)
2-State
PAYLOAD DATA
A
A
A
A
Table 17. SLC-96 9-State Signaling Format
Transmit Signaling Registers Settings
Transmit to the Line Signal Bits
SLC-96 Signaling States
State 1
State 2
State 3
State 4
State 5
State 6
State 7
State 8
State 9
A
0
0
0
0
0
0
1
1
1
B
0
0
1
0
0
1
0
0
1
C
0
0
0
1
1
1
X
X
X
D
0
1
X
0
1
X
0
1
X
A = f(A, C)
0
0
0
T
T
T
1
1
1
B = f(B, D)
0
T
1
0
T
1
0
T
1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
T-7230A--ML 制造商:Rochester Electronics LLC 功能描述:- Bulk
T7230-ML3 制造商:AGERE 功能描述:
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T7-231A2 制造商:OTTO Engineering Inc 功能描述:2POLE, SOLDER, STD,
T7-231A2D 功能描述:撥動(dòng)開關(guān) ON NONE OFF 2 Pole Standard LeverLock RoHS:否 制造商:OTTO 觸點(diǎn)形式: 開關(guān)功能: 電流額定值: 電壓額定值 AC: 電壓額定值 DC: 功率額定值: 端接類型: 安裝風(fēng)格: 端子密封: 觸點(diǎn)電鍍: 照明: