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參數(shù)資料
| 型號： | T7230A |
| 廠商： | Lineage Power |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 12/110頁 |
| 文件大小： | 752K |
| 代理商： | T7230A |
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Preliminary Data Sheet
T7230A Primary Access Framer/Controller
June 1997
8
Lucent Technologies Inc.
Functional Description
The Lucent Technologies T7230A Primary Access
Controller/Framer (PAC) provides a complete T1 or E1
digital framing solution within one package. The
T7230A can interface to devices using the Lucent
Technologies Microelectronics Group system CHI; for
example, the T7270 time-slot interchanger or T7115A
synchronous protocol data formatter and DS1/T1 or
ITU-CEPT line interface devices, such as the T7290A
DSI/E1 line interface unit.
The line interface is a dual-rail interface that supports
AMI, T1 B8ZS, per-channel T1 ZSC, and ITU-CEPT
HDB3 line code formats. Optionally, the T7230A can
transmit and receive single-rail line data.
Framing formats supported include T1D4, T1DM, and
SLC
-96 superframing and extended superframing; ITU-
CEPT basic framing; and ITU-CEPT time slot 0 and
time slot 16 multiframing.
Alarm monitoring by the receive framer includes detec-
tion of loss of receive clock, red, yellow, and blue (AIS)
alarms. These alarms are detected as defined by
ANSI, AT&T, and ITU standards. The transmit framer
detects loss of transmit clock.
Performance monitoring as specified by AT&T, ANSI,
and ITU is provided through counters monitoring frame
bit errors, bipolar violation, CRC errors, errored events,
errored seconds, bursty errored seconds, severely
errored seconds, and unavailable or failed seconds.
In-band loopback activation and deactivation codes
can be transmitted to the line. In-band loopback activa-
tion and deactivation codes are detected.
Remote, payload, and line loopback modes are pro-
grammable.
The signaling formats supported are T1 per-channel
robbed-bit signaling (RBS), channel-24 message-
oriented signaling (MOS), ITU-CEPT channel-
associated signaling (CAS), ITU-CEPT common
channel signaling (CCS), and international remote
switching module (IRMS). In the T1 RBS mode, voice
and data channels are programmable. The entire
payload can be forced into a no signaling, i.e., data
only by programming one control bit.
Channelized data and its corresponding signaling
information can be accessed through the system
interface (concentration highway interface).
Extraction and insertion of the facility data link in ESF,
T1DM,
SLC
-96, or ITU-CEPT modes is provided
through a four-port serial interface.
A two-frame elastic store buffer for jitter attenuation
performs controlled slips and provides indication of slip
direction. This buffer can be programmed to operate as
a function of the receive line clock and can be reduced
to 11 bytes in length.
The system interface is a 2.048 Mbits/s data 2.048
MHz clock concentration highway interface (CHI) serial
bus. This interface can be reconfigured into several
modes: a 2.048 Mbits/s data/4.096 MHz clock; a 4.096
Mbits/s data/4.096 MHz clock; or a 4.096 Mbits/s data/
8.192 MHz clock.
Accessing internal registers is done through a demulti-
plexed address and data bus microprocessor interface
using either the
Intel
80188 (or 80X88) interface proto-
col with independent read and write signals or the
Motorola
MC680X0 interface protocol with address and
data strobe signals.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| T-7230A--ML | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| T7230-ML3 | 制造商:AGERE 功能描述: |
| T7-231A1 | 功能描述:撥動開關(guān) ON NONE OFF 2 Pole Standard Bat Handle RoHS:否 制造商:OTTO 觸點形式: 開關(guān)功能: 電流額定值: 電壓額定值 AC: 電壓額定值 DC: 功率額定值: 端接類型: 安裝風(fēng)格: 端子密封: 觸點電鍍: 照明: |
| T7-231A2 | 制造商:OTTO Engineering Inc 功能描述:2POLE, SOLDER, STD, |
| T7-231A2D | 功能描述:撥動開關(guān) ON NONE OFF 2 Pole Standard LeverLock RoHS:否 制造商:OTTO 觸點形式: 開關(guān)功能: 電流額定值: 電壓額定值 AC: 電壓額定值 DC: 功率額定值: 端接類型: 安裝風(fēng)格: 端子密封: 觸點電鍍: 照明: |
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