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參數(shù)資料
| 型號： | T7230A |
| 廠商： | Lineage Power |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 58/110頁 |
| 文件大?。?/td> | 752K |
| 代理商： | T7230A |
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Preliminary Data Sheet
T7230A Primary Access Framer/Controller
June 1997
54
Lucent Technologies Inc.
Alarms and Performance Monitoring
(continued)
9. The
4-bit Sa6 codes
(Sa6_
hex
) are asserted if three consecutive 4-bit patterns have been detected. The alarms
are disabled when three consecutive 4-bit Sa6 codes have been detected that are different from the pattern
previously detected. The receive framer monitors the Sa6 bits for ten special codes described in ETS Draft
prETS 300 233:1992 Section 9.2. The Sa6 codes are defined in Table 27 and Table 28. The Sa6 codes in
Table 27 may be recognized as an asynchronous bit stream in either non-CRC-4 or CRC-4 modes; the receive
framer must be in the basic frame alignment state. In the CRC-4 mode, the receive framer may be forced to
recognize the received Sa6 codes in Table 27 synchronously to the CRC-4 submultiframe structure; the receive
framer must be in the CRC-4 multiframe alignment state. The Sa6 codes in Table 28 are only recognized
synchronously to the CRC-4 submultiframe and when the receive framer is in CRC-4 multiframe alignment. The
detection of three consecutive 4-bit patterns are required to indicate a valid received Sa6 code. In the receive
Sa6 status register, multiple Sa6 bit positions may be set. However, one and only one Sa6 bit position can
remain set after the initial read to this register. Once set, any three-nibble (12-bit) interval that contains any
other Sa6 code will clear the current Sa6 code setting. Interrupts may be generated by the six 4-bit Sa6 codes
given in Table 27 and Table 28.
Table 28 defines the three 4-bit Sa6 codes that are always detected synchronously to the CRC-4 submultiframe
structure, and are only used for counting NT1 events.
Table 27. Sa6 Bit Coding Recognized by the T7230A Receive Framer
Code
First Receive Bit (MSB)
Last Received Bit (LSB)
Sa6_8
hex
Sa6_A
hex
Sa6_C
hex
Sa6_E
hex
Sa6_F
hex
Sa6_X
hex
1
1
1
1
1
0
0
1
1
1
0
1
0
1
1
0
0
0
0
1
All other bit combinations.
Table 28. Sa6 Bit Coding of NT1 Interface Events Recognized by the T7230A Receive Framer
Code
First Receive Bit
(MSB)
Last Received Bit
(LSB)
Event at NT1
Sa6_1
hex
Sa6_2
hex
Sa6_3
hex
0
0
0
0
0
0
0
1
1
1
0
1
E = 0
CRC-Error
CRC-Error & E = 0
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