參數(shù)資料
型號: T7230A
廠商: Lineage Power
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 37/110頁
文件大小: 752K
代理商: T7230A
Preliminary Data Sheet
June 1997
T7230A Primary Access Framer/Controller
33
Lucent Technologies Inc.
Frame Formats
(continued)
CEPT 2.048 Basic Frame Structure
The ITU Rec. G.704 Section 2.3.1 defined frame length is 256 bits, numbered 1 to 256. The frame repetition rate is
8 kHz. The allocation of bits numbered 1 to 8 of the frame is shown in Table 18.
Table 18. Allocation of Bits 1 to 8 of the FAS Frame and the NOT FAS Frame
The function of each bit in Table 18 is described below:
1.
The Si bits are reserved for international use. A specific use for these bits is described in the CRC-4 Multiframe
section. If no use is realized, these bits should be fixed at 1 on digital paths crossing an international border.
2.
Bit 2 of the frames not containing the FAS (i.e., the NOT FAS frames) is fixed to 1 to assist in avoiding simula-
tions of the frame alignment signal.
3.
Bit 3 of the NOT FAS is the remote alarm indication (A bit). In undisturbed operation, A bit = 0; in alarm condi-
tion, A bit = 1.
4.
Bits 4—8 of the NOT FAS may be recommended by ITU for use in specific point-to-point applications. Bit Sa4
may be used as a message-based data link for operations, maintenance, and performance monitoring. If the
data link is accessed at intermediate points with consequent alterations to the Sa4 bit, the CRC-4 bits must be
updated to retain the correct end-to-end path termination functions associated with the CRC-4 procedure. The
receive framer does not implement the CRC-4 modifying algorithm described in ITU Rec. G.706 Annex C. Bits
Sa4—Sa8, where these are not used, should be set to 1 on links crossing an international border.
5.
MSB = most significant bit. This bit is transmitted first.
6.
LSB = least significant bit. This bit is transmitted last.
The T7230A may be programmed in a frame transparent mode. This mode transmits the received system data to
the line transparently, i.e., the FAS and NOT FAS time slots are not modified by the transmit framer. The system-
frame sync (FS) is used to define time slot 0 through the transmit framer. While in this mode the receive framer will
not
align to the received line data. Setting PR8 bits[0:5] to 1 forces the transmit and receive framers into this state.
CEPT Loss of Basic Frame Alignment (LFA)
Frame alignment is assumed to be lost when:
1.
As described in ITU Rec. G.706 Section 4.1.1, three consecutive incorrect frame alignment signals have been
received.
2.
So as to limit the effect of spurious frame alignment signals, when bit 2 in time slot 0 in NOT FAS frames have
been received with an error on three consecutive occasions.
3.
Optionally, as described in ITU Rec. G.706 Section 4.3.2, by exceeding a count of >914 errored CRC-4 blocks
out of 1000, with the understanding that a count of
915 errored CRC blocks indicates false frame alignment.
4.
On demand via the control registers.
Basic Frames
Bit 1
(MSB)
Si
Si
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
(LSB)
1
Sa8
Frame Alignment Signal (FAS)
Not Frame Alignment Signal
0
1
0
A
1
1
0
1
Sa4
Sa5
Sa6
Sa7
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