- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄382571 > T7230A (Lineage Power) Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 PDF資料下載
參數(shù)資料
| 型號： | T7230A |
| 廠商： | Lineage Power |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 52/110頁 |
| 文件大?。?/td> | 752K |
| 代理商： | T7230A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁當前第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁
Preliminary Data Sheet
T7230A Primary Access Framer/Controller
June 1997
48
Lucent Technologies Inc.
CEPT Time Slot 0 FAS/NOT FAS Control Bits
(continued)
Sa Facility Data Link Access
The data link interface may be used to source one of the Sa bits. When enabled, this transmit access mode
supersedes all access modes for the selected Sa bit. The receive Sa data is always
present at the receive facility
data link output pin, RFD, along with a valid clock signal at the receive facility clock output pin, RFCK. During an
LFA state, the RFD signal is forced to a 1 state and RFCK continues to toggle on the basic frame alignment. When
basic frame alignment is found, RFD is as received from the selected RSa bit position and RFCK is forced (if
necessary) to the new alignment. The data rate for this access mode is 4 kHz.
Microprocessor Sourcing of the Si and Sa4 to Sa8 Bits
The microprocessor sourcing mode for the Si and Sa4 to Sa8 bits is the control register. Programming PR6, bit 6 to
1 enables the information in the control register corresponding to the Sa4 to Sa8 bits to be transmitted to the line.
Programming PR7, bit 6 to 1 enables the information in the control registers corresponding to the Si bits to be
transmitted to the line. The receive Si and Sa4 to Sa8 bits from the last valid NOT FAS frame are always in the NOT
FAS status register.
CEPT Time Slot 16 X0—X2 Control Bits
The three X bits in frame 0 of the time slot 16 multiframe can be used as a 0.5 kbits/s data link to and from the
remote end. The transmitted line X bits are sourced from the control registers. In the LMFA state, receive X bits = 1
in the status registers.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| T7256 | ISDN Transceiver(ISDN收發(fā)器) |
| T7234 | ISDN Transceiver(ISDN收發(fā)器) |
| T7237 | ISDN Transceiver(ISDN收發(fā)器) |
| T7264 | U-Interface 2B1Q Transceiver(U接口 2B1Q收發(fā)器) |
| T7264 | T7264 U-Interface 2B1Q Transceiver |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| T-7230A--ML | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| T7230-ML3 | 制造商:AGERE 功能描述: |
| T7-231A1 | 功能描述:撥動開關(guān) ON NONE OFF 2 Pole Standard Bat Handle RoHS:否 制造商:OTTO 觸點形式: 開關(guān)功能: 電流額定值: 電壓額定值 AC: 電壓額定值 DC: 功率額定值: 端接類型: 安裝風格: 端子密封: 觸點電鍍: 照明: |
| T7-231A2 | 制造商:OTTO Engineering Inc 功能描述:2POLE, SOLDER, STD, |
| T7-231A2D | 功能描述:撥動開關(guān) ON NONE OFF 2 Pole Standard LeverLock RoHS:否 制造商:OTTO 觸點形式: 開關(guān)功能: 電流額定值: 電壓額定值 AC: 電壓額定值 DC: 功率額定值: 端接類型: 安裝風格: 端子密封: 觸點電鍍: 照明: |
發(fā)布緊急采購，3分鐘左右您將得到回復。