參數(shù)資料
型號： T7230A
廠商： Lineage Power
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 35/110頁
文件大小： 752K
代理商： T7230A
Preliminary Data Sheet
June 1997
T7230A Primary Access Framer/Controller
31
Lucent Technologies Inc.
Frame Formats
(continued)
T1 Frame Recovery Alignment Algorithms
While in the LFA state, a read of the LFA status register will cause the
Loss_of_Frame_Alignment_from_Last_Read (LFALR) status bit to be set. LFALR will remain set while the current
LFA state is active. The receive framer will force LFALR bit to
0
when frame alignment is established.
When in a loss of frame alignment state, the receive framer searches for a new frame alignment and forces its
internal circuitry to this new alignment. The T7230A’s synchronization circuit inhibits realignment in T1 framing for-
mats when repetitive data patterns emulate the T1 frame alignment patterns. The loss of frame alignment will
always force a loss of superframe alignment. T1 frame synchronization will not occur until all emulators disappear
and only one valid pattern exists. Superframe alignment is established only after frame alignment has been deter-
mined in the D4 and SLC-96 frame format. Table 15 gives the requirements for establishing T1 frame and super-
frame alignment.
Table 15. T1 Frame Alignment Procedures
Frame Format
Alignment Procedure
Alignment Times
(ms)
6
D4: frame
Using the F
T
frame position as the reference point, frame align-
ment is established when 24 consecutive F
T
and F
S
frame bit
pairs (48 total frames) are received error-free. Once frame align-
ment is established, then superframe alignment is determined.
After frame alignment is determined, two valid superframe bit
sequences using only the F
S
bits must be received error-free to
establish superframe alignment.
Using the F
T
frame position as the reference point, frame align-
ment is established when 24 consecutive F
T
frame bits (48 total
frames) are received error-free. Once frame alignment is estab-
lished, superframe alignment is determined.
After frame alignment is determined, superframe alignment is
established on the first valid superframe bit sequence using the
F
S
bits that exist for two consecutive superframe periods.
Using the F
T
frame position as the reference point, frame align-
ment is established when six consecutive F
T
and F
S
frame bits
and the DDS FAS in time slot 24 are received error-free. In the
DDS format, there is no search for a superframe structure.
Frame alignment is established simultaneously using the F
E
framing bit. Alignment is established when 24 consecutive F
E
bits are received error-free. Once frame alignment is established,
the receive framer will force an LFA state whenever 32 consecu-
tive CRC-6 errors are detected. This condition is indicated in the
status registers (see Table 37, Interrupt Status Register (SR0),
on page 71).
D4: superframe
3
SLC-96: frame
6
SLC-96: superframe
6
DDS: frame
0.75
ESF
12
相關(guān)PDF資料
PDF描述
T7256 ISDN Transceiver(ISDN收發(fā)器)
T7234 ISDN Transceiver(ISDN收發(fā)器)
T7237 ISDN Transceiver(ISDN收發(fā)器)
T7264 U-Interface 2B1Q Transceiver(U接口 2B1Q收發(fā)器)
T7264 T7264 U-Interface 2B1Q Transceiver
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
T-7230A--ML 制造商:Rochester Electronics LLC 功能描述:- Bulk
T7230-ML3 制造商:AGERE 功能描述:
T7-231A1 功能描述:撥動開關(guān) ON NONE OFF 2 Pole Standard Bat Handle RoHS:否 制造商:OTTO 觸點形式: 開關(guān)功能: 電流額定值: 電壓額定值 AC: 電壓額定值 DC: 功率額定值: 端接類型: 安裝風(fēng)格: 端子密封: 觸點電鍍: 照明:
T7-231A2 制造商:OTTO Engineering Inc 功能描述:2POLE, SOLDER, STD,
T7-231A2D 功能描述:撥動開關(guān) ON NONE OFF 2 Pole Standard LeverLock RoHS:否 制造商:OTTO 觸點形式: 開關(guān)功能: 電流額定值: 電壓額定值 AC: 電壓額定值 DC: 功率額定值: 端接類型: 安裝風(fēng)格: 端子密封: 觸點電鍍: 照明:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*