
3.0 Device Architecture and Configuration
(Continued)
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3.13 KEYBOARD AND MOUSE CONTROLLER (KBC) CONFIGURATION
3.13.1
The KBC is implemented physically as a single hardware module and houses two separate logical devices: a Mouse con-
troller (Logical Device 5) and a Keyboard controller (Logical Device 6). The KBC is functionally equivalent to the industry
standard 8042A Keyboard controller. Technical references for the standard 8042A Keyboard Controller may serve as de-
tailed technical references for the KBC.
The Keyboard and Mouse Controller runtime registers are described in Section 10.4 on page 229. All the registers are V
DD
powered.
General Description
3.13.2
Tables 22 and 23 list the configuration registers that affect the Mouse and the Keyboard logical devices, respectively. Only
the last register (F0h) is described here. See Section 3.2.3 on page 40 for descriptions of the other configuration registers.
All these registers are V
DD
powered.
Logical Devices 5 and 6 (Mouse and Keyboard) Configuration
Table 22. Mouse Configuration Registers
Table 23. Keyboard Configuration Registers
Index
Mouse Configuration Register or Action
Type
Power Well
Reset
30h
Activate (see Section 3.2.3 on page 40). When the Mouse of the KBC is
inactive, the IRQ selected by the Mouse Interrupt Number and Wake-Up on IRQ
Enable register (index 70h) are not asserted. This register has no effect on host
KBC commands handling the PS/2 Mouse.
R/W
V
DD
00h
70h
Mouse Interrupt Number and Wake-Up on IRQ Enable register.
R/W
V
DD
V
DD
V
DD
V
DD
0Ch
71h
Mouse Interrupt Type. Bits 1,0 are read/write; other bits are read only.
R/W
02h
74h
Report no DMA assignment.
RO
04h
75h
Report no DMA assignment.
RO
04h
Index
Keyboard Configuration Register or Action
Type
Power Well
Reset
30h
Activate (see Section 3.2.3 on page 40). When the Keyboard of the KBC is
inactive, the IRQ selected by the Keyboard Interrupt Number and Wake-Up on
IRQ Enable register (index 70h) are not asserted.
R/W
V
DD
00h
60h
Base Address MSB register. Bits 7-3 (for A15-11) are read only, 00000b.
R/W
V
DD
V
DD
V
DD
00h
61h
Base Address LSB register. Bits 2-0 (for A2-0) are read-only 000b.
R/W
60h
62h
Command Base Address MSB register. Bits 7-3 (for A15-11) are read only,
00000b.
R/W
00h
63h
Command Base Address LSB. Bits 2-0 (for A2-0) are read-only 100b.
R/W
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
64h
70h
KBD Interrupt Number and Wake-Up on IRQ Enable register.
R/W
01h
71h
KBD Interrupt Type. Bits 1,0 are read/write; others are read only.
R/W
02h
74h
Report no DMA assignment.
RO
04h
75h
Report no DMA assignment.
RO
04h
F0h
KBC Configuration register.
R/W
40h