
1.0 Signal/Pin Connection and Description
(Continued)
Revision 1.2
29
www.national.com
P
1.4.10
Clocks
1.4.11
Configuration Straps
Signal
Pin(s) I/O Buffer Type Power Well
Description
32KX1_32KCLKIN
1
1. This pin is not 5-volt tolerant.
2. This pin is neither 5-volt tolerant nor back-drive protected.
3. The CLKIN signal source can be V
DD
powered.
42
I
IN
OSC
V
PP
32.768 KHz Crystal Input.
Input from external crystal
oscillator circuitry.
32.768 KHz Clock Oscillator Input.
Input from external
clock oscillator device.
32KX2
2
44
O
O
OSC
V
PP
32.768 KHz Crystal Oscillator Output.
Output to external
crystal oscillator circuitry.
LFCKOUT
45
O
O
1/2
V
SB
Low Frequency Clock Output.
The Real-Time Clock
frequency (32.768 KHz) or a 1 Hz clock output.
CLKIN
56
I
IN
TS
V
SB3
Clock Input.
48 MHz for the Legacy functions or no input
clock.
HFCKOUT
13
O
O
2/4
V
SB
High Frequency Clock Output.
Clock output for system
use.
Signal
Pin(s)
I/O
Buffer Type Power Well
Description
BADDR
100
I
IN
CS
V
DD
Base Address.
Sampled at V
DD
Power-Up reset to determine
the base address of the configuration Index-Data register pair,
as follows:
No pull-up resistor:
10 K
external pull-up resistor:
2Eh-2Fh
4Eh-4Fh
TRIS
97
I
IN
CS
V
DD
TRI-STATE Device.
Sampled at V
DD
Power-Up reset to force
the device to float all its output and I/O pins, as follows:
No pull-up resistor: pins active
4.7 K
external pull-up resistor:pins floating
CKIN48
55
I
IN
CS
V
SB
CLKIN 48 MHz.
Sampled at V
SB
Power-Up reset to determine
the presence of the 48 MHz input clock at the CLKIN pin, as
follows:
No pull-up resistor:
10 K
external pull-up resistor:
no clock
48 MHz clock
XCNF2-0
(
PC87416,
PC87417
)
32-34
I
IN
CS
V
SB
X-Bus Default Configuration.
Sampled at V
SB
Power-Up reset
to set the configuration of the X-Bus transactions.
Pins
2 1 0
Functionality
0 x x
No BIOS
1 0 0
With BIOS, XA11-4 multiplexed, XRDY disabled
1 0 1
With BIOS, XA11-4 multiplexed, XRDY enabled
1 1 0
With BIOS, XA11-4 direct, XRDY disabled
1 1 1
With BIOS, XA11-4 direct, XRDY enabled
Pulled to 0 by internal resistor or set to 1 by external 10 K
pull-
up resistor.
ACBSA
(
PC87413,
PC87417
)
48
I
IN
CS
V
SB
ACCESS.bus Slave Address.
Sampled at V
SB
Power-Up reset
to determine the slave address of the device on the
ACCESS.bus, as follows
No pull-up resistor:
10 K
external pull-up resistor:
D8h, D9h
60h, 61h