參數(shù)資料
型號(hào): PC87413
廠商: National Semiconductor Corporation
英文描述: LPC ServerI/O for Servers and Workstations
中文描述: LPC ServerI /服務(wù)器和工作站
文件頁(yè)數(shù): 170/257頁(yè)
文件大小: 3163K
代理商: PC87413
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9.0 System Wake-Up Control (SWC)
(Continued)
www.national.com
170
Revision1.2
P
the related event generates a wake-up (i.e., it turns the V
DD
power supply On by setting ONCTL = 0). The ONCTL_EN_S3I
and ONCTL_EN_S45 bits enable or disable wake-up by the event when the PC8741x device is in S3I or in S45 current state,
respectively. Only two events lack a Wake-Up State Enable register (WK_ST_EN). These are:
The watchdog event (flagged by the WDO_EVT_STS bit): this event does not affect ONCTL generation.
The Power button event (flagged by either the PWBT_EVT_STS bit or the PWRBTN_STS bit): this event uncondi-
tionally generates a wake-up (sets ONCTL = 0) when the PC8741x device is in S3I or S45 current states.
In addition, in Legacy Power Button mode (LEGACY_PWBT = 1 in the PWONCTL register), all wake-up events are ignored
(regardless of the bit value in their WK_ST_EN register) after the power supply has been turned off (by setting ONCTL = 1)
in response to a Power button event. In this case, the next Power button event unconditionally generates a wake-up (sets
ONCTL = 0).
Optionally, the system ACPI controller can be located in an external device. To select this option, both the EXT_ST_SELECT
bit in the SLP_ST_CFG register (see Section 9.3.31 on page 200) and the EXTSTMUX bit in the SIOCF3 register (see Sec-
tion 3.7.4 on page 51) must be set to ‘1’. In this case, ONCTL is turned On when the SLPS3 signal goes high (the system
is in S0 - S2 states). In this mode, ONCTL is independent of any wake-up event, including the Power button event (flagged
by either the PWBT_EVT_STS bit or the PWRBTN_STS bit).
Any valid wake-up event is disabled from reactivating the V
DD
power supply (by setting ONCTL = 0) for 1 second after the
power supply has been turned off (by setting ONCTL = 1). This feature protects the power supply from repeated on/off
switching if an event (such as Power button) is active for an extended period of time. If the Keyboard/Mouse Power Control
feature (VDDFELL; see Section 9.2.10 on page 175) is enabled by setting the VDDFLMUX bit to ‘1’ (in the SIOCF2 register;
see Section 3.7.3 on page 50), the Keyboard and Mouse wake-up events are disabled from reactivating the V
DD
for 2 sec-
onds after the power supply has been turned off (by setting ONCTL = 1).
Figure 50. ONCTL Control
Power Button Output (PWBTOUT)
The PWBTOUT function of the PC8741x device enables the (optional) external ACPI controller to synchronize its operation
to the wake-up events detected by the PC8741x device and to control the V
DD
power supply.
The Power button input (PWBTIN) is bridged to PWBTOUT regardless of any PC8741x device configuration bits, internal
state or wake-up event. This bridging is also independent of the status of the V
DD
power supply.
GPE1_STS_0-3
Detected
Event
(one of 31
events)
Status
Set
S3I_
VDD_ON
ONCTL
State S3I
State S45
From Other
Enabled Events
ONCTL_
EN_S45
State S45
ONCTL_
EN_S3I
State S3I
Set
Reset
Off
On
Power Button Override
Crowbar
1 Second
Pulse
EXT_ST_
SELECT
SLPS3
Resume
from
Power Fail
1
0
SLPS5
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