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參數(shù)資料
| 型號(hào)： | PC87413 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | LPC ServerI/O for Servers and Workstations |
| 中文描述： | LPC ServerI /服務(wù)器和工作站 |
| 文件頁(yè)數(shù)： | 35/257頁(yè) |
| 文件大?。?/td> | 3163K |
| 代理商： | PC87413 |
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2.0 Power, Reset and Clocks
(Continued)
Revision 1.2
35
www.national.com
P
2.2.3
The Controller Software reset is initiated by the system controller through the ACCESS.bus Interface. The system controller
can trigger this reset by setting the CSWRST bit of the ACBCFG register (see Section 6.3.3 on page 128).
The Controller Software reset performs the following actions:
Updates the V
SB
-powered strap configuration bits with the strap levels sampled during the V
SB
Power-Up reset.
Loads default values to the V
SB
-powered unlocked bits in the Configuration Control and X-Bus (
PC87416 and PC87417
).
Loads default values to the unlocked GPIO Configuration and Data bits for those GPIO ports with VDDLOAD = 0. The
VDDLOAD and BUSCTL bits are not affected.
Loads default values to the bits in the ACBCST, ACBDIS and ACBTRIS registers of the ACCESS.bus Interface
(
PC87413 and PC87417
).
Terminates any transaction involving the internal modules of the PC8741x device that were initiated by the ACCESS.bus
Interface.
Controller Software Reset (PC87413 and PC87417)
2.2.4
V
DD
Power-Up reset is generated by an internal circuit when V
DD
power is turned on. This reset is completed after 8,192
cycles of the 32 KHz clock (t
32KOSC
; see
Low Frequency Clock Timing
on page 242). However, if the Hardware reset
(LRESET) is de-asserted in an early stage, t
IRST
(see
VSB Power-Up Reset
on page 239) is shortened to only 1,280 clock
cycles. In any condition, the V
DD
Power-Up reset ends after the V
SB
Power-Up reset.
External devices must wait at least t
IRST
before accessing the PC8741x device. If the host processor accesses the device
during this time, the PC8741x device ignores the transaction (that is, it does not return SYNC response).
V
DD
Power-Up reset performs the following actions:
Puts pins with V
DD
strap options into TRI-STATE and enables their internal pull-down resistors.
Samples the logic levels of the V
DD
strap pins.
Executes all the actions performed by the Hardware reset (see Section 2.2.5 on page 35).
V
DD
Power-Up Reset
2.2.5
Hardware reset is activated by the assertion (low) of the LRESET input while V
DD
is “good”. When the V
DD
power is Off, the
PC8741x device ignores the level of the LRESET input. Hardware reset performs the following actions:
Resets the V
SB
-powered lock bits in the Configuration Control and X-Bus (
PC87416 and PC87417
), if VSBLOCK = 0 in
the ACBLKCTL register (in PC87414 and PC87416, VSBLOCK is always ‘0’).
Sets up the pull-up option and the default source for the V
DD
-powered multiplexed output pins.
Executes all the actions performed by the Host Software reset (see Section 2.2.6 on page 35).
Hardware Reset
2.2.6
The Host Software reset is triggered by the host setting the HSWRST bit of the SIOCF1 register (see Section 3.7.2 on
page 49) through the LPC Interface. The Host Software reset performs the following actions:
Updates the V
DD
-powered strap configuration bits with the strap levels sampled during the V
DD
Power-Up reset.
Loads default values to the V
DD
-powered unlocked bits in the Configuration Control.
Loads default values to the V
SB
-powered unlocked GPIO Configuration and Data bits for those GPIO ports with
VDDLOAD = 1. The VDDLOAD and BUSCTL bits are not affected.
Resets all the V
DD
-powered Legacy logical devices.
Loads default values to all the V
DD
-powered Legacy module registers.
Terminates any transaction involving the internal modules of the PC8741x device that were initiated by the LPC bus In-
terface.
Host Software Reset
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PC87414 | LPC ServerI/O for Servers and Workstations |
| PC87416 | LPC ServerI/O for Servers and Workstations |
| PC87417 | LPC ServerI/O for Servers and Workstations |
| PC87415 | PCI-IDE DMA Master Mode Interface Controller |
| PC87415VCG | PCI-IDE DMA Master Mode Interface Controller |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PC87414 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:LPC ServerI/O for Servers and Workstations |
| PC87415 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PCI-IDE DMA Master Mode Interface Controller |
| PC87415VCG | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| PC87416 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:LPC ServerI/O for Servers and Workstations |
| PC87417 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:LPC ServerI/O for Servers and Workstations |
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