
3.0 Device Architecture and Configuration
(Continued)
Revision 1.2
53
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P
3.7.6
Power Well:V
SB
Location:Index 25h
Type:
R/W or RO
ServerI/O Configuration 5 Register (SIOCF5)
Bit
Name
Reset
7
6
5
4
3
2
1
0
XIRQMUX
0
XSTB2MUX XSTB1MUX XSTB0MUX XCS3MUX
Strap
Strap
XCS2MUX
0
XCS1MUX
0
XCS0MUX
Strap
Strap
0
Bit
Description
7
XIRQMUX (XIRQ Multiplex Control).
Selects the function connected to pin 10.
0: GPIO06 port - GPIO (default; internally, XIRQ is set to 0; Interrupt not active)
1: XIRQ - X-Bus (
PC87416 and PC87417
)
6
XSTB2MUX (XSTB2 Multiplex Control).
Selects the function connected to pin 32. The default value is set to 0
if XCNF2 = 1 or to 1 if XCNF2 = 0. The XCNF2 strap is sampled at V
SB
Power-Up reset.
0: XSTB2 - X-Bus (
PC87416 and PC87417
)
1: GPO60 port - GPIO
5
XSTB1MUX (XSTB1 Multiplex Control).
Selects the function connected to pin 33. The default value is set to 0
if XCNF2 = 1 or to 1 if XCNF2 = 0. The XCNF2 strap is sampled at V
SB
Power-Up reset.
0: XSTB1 - X-Bus (
PC87416 and PC87417
)
1: GPO61 port - GPIO
4
XSTB0MUX (XSTB0 Multiplex Control).
Selects the function connected to pin 34. The default value is set to 0
if XCNF2 = 1 or to 1 if XCNF2 = 0. The XCNF2 strap is sampled at V
SB
Power-Up reset.
0: XSTB0 - X-Bus (
PC87416 and PC87417
)
1: GPO62 port - GPIO
3
XCS3MUX (XCS3 Multiplex Control).
Selects the function connected to pin 20.
0: GPIOE40 port - GPIO (default)
1: XCS3 - X-Bus (
PC87416 and PC87417
)
2
XCS2MUX (XCS2 Multiplex Control).
Selects the function connected to pin 21.
0: GPIOE41 port - GPIO (default)
1: XCS2 - X-Bus (
PC87416 and PC87417
)
1
XCS1MUX (XCS1 Multiplex Control).
Selects the function connected to pin 22.
0: GPIO26 port - GPIO (default)
1: XCS1 - X-Bus (
PC87416 and PC87417
)
0
XCS0MUX (XCS0 Multiplex Control).
Selects the function connected to pin 23. The default value is set to 0 if
XCNF2 = 1 or to 1 if XCNF2 = 0. The XCNF2 strap is sampled at V
SB
Power-Up reset.
0: XCS0 - X-Bus (
PC87416 and PC87417
)
1: GPIO27 port - GPIO