
9.0 System Wake-Up Control (SWC)
(Continued)
Revision 1.2
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Figure 49. Dual Control Functions
9.2.5
The SWC generates two Power Management signals: ONCTL, for the V
DD
power supply control, and PWBTOUT, which is
used by an external ACPI controller. These signals are based on the external and internal events, each with its status and
enable bits in the SWC module (including GPIOE). ONCTL and the PWBTOUT are generated according to the current sleep
state.
Special Power Management functions, either required by the ACPI Specification or inherited from the Legacy Power Man-
agement, also affect the ONCTL and PWBTOUT outputs. These functions are described in Section 9.2.6.
Power Management Signals
Power Supply Control (ONCTL)
Each active external or internal event (including GPIOE) sets a status bit in the GPE1_STS_0 to GPE1_STS_3 registers.
Three events (Power button, Sleep button and RTC alarm) each have an additional status bit in the PM1b_STS_HIGH reg-
ister. Their behavior is described in the
SCI Interrupt
section (page 168).
ONCTL generation is independent of the enable bits in the GPE1_EN_0 to GPE1_EN_3 registers. It is also independent of
the three additional enable bits in the PM1b_EN_HIGH register (for Power button, Sleep button and RTC alarm events).
ONCTL is not affected by the Watchdog Status bit (WDO_EVT_STS).
ONCTL is turned off (inactive: ONCTL = high level) according to the current sleep states, S3I and S45 (S12 is the active
state for the PC8741x device and does not influence ONCTL; see Section 9.2.3 on page 167). These current sleep states
are decoded from the value of the SLP_TYPx field of the PM1b_CNT_HIGH register (for EXT_ST_SELECT = 0 in the
SLP_ST_CFG register) or from the levels of the SLPS3 and SLPS5 signals (for EXT_ST_SELECT = 1 in the SLP_ST_CFG
register and EXTSTMUX = 1 in the SIOCF3 register). In Legacy Power button mode, when the V
DD
power is on, an S45
current state is generated by a low-level signal at PWBTIN, overriding the decoded sleep states.
When the PC8741x device enters the S45 state, it turns the V
DD
power supply Off by setting ONCTL = 1. The state of the
V
DD
power supply (On or Off) in S3I state depends on the setting of the S3I_VDD_ON bit in the SLP_ST_CFG register (see
Section 9.3.31 on page 200).
If the PC8741x device is the ACPI controller of the system (EXT_ST_SELECT = 0 in the SLP_ST_CFG register), ONCTL is
turned On by an active wake-up event. This is possible only if the event is enabled for wake-up (in the WK_ST_EN register)
in the current sleep state.
Each external or internal event has its own Wake-Up State Enable register (WK_ST_EN), which is accessed by the software
writing its index value (see Table 48 on page 179) into the WKUPSEL field of the Wake-Up Event Select register
(WK_EVT_SEL; see Section 9.3.2). The currently accessed WK_ST_EN register selects the current sleep states for which
Enable
GPE1_STS_2/3
Status
Set
Enable
Status
Set
Reset
Reset
GPE1_STS_2/3
PM1b_STS_HIGH
PM1b_EN_HIGH
Detected Event
Disable
ACPI_CFG
1
0
Interrupt
SCI
State S0
Only for
Power Button Event
From Other
Enabled Events