
Table of Contents
(Continued)
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14
Revision1.2
P
9.4.12
9.4.13
9.4.14
9.4.15
General-Purpose Enable 1 Register 0 (GPE1_EN_0) ...............................................213
General-Purpose Enable 1 Register 1 (GPE1_EN_1) ...............................................213
General-Purpose Enable 1 Register 2 (GPE1_EN_2) ...............................................214
General-Purpose Enable 1 Register 3 (GPE1_EN_3) ...............................................215
9.5
SYSTEM WAKE-UP CONTROL REGISTERS BITMAP .........................................................216
10.0 Legacy Functional Blocks
10.1
FLOPPY DISK CONTROLLER (FDC) ....................................................................................220
10.1.1
General Description ...................................................................................................220
10.1.2
FDC Bitmap Summary ...............................................................................................221
10.2
PARALLEL PORT ...................................................................................................................222
10.2.1
General Description ...................................................................................................222
10.2.2
Parallel Port Register Map .........................................................................................222
10.2.3
Parallel Port Bitmap Summary ..................................................................................223
10.3
SERIAL PORTS (SP1 AND SP2) ............................................................................................225
10.3.1
General Description ...................................................................................................225
10.3.2
Register Bank Overview ............................................................................................225
10.3.3
SP1/SP2 Register Maps ............................................................................................226
10.3.4
SP1 Bitmap Summary ...............................................................................................227
10.4
KEYBOARD AND MOUSE CONTROLLER (KBC) .................................................................229
10.4.1
General Description ...................................................................................................229
10.4.2
KBC Register Map .....................................................................................................230
10.4.3
KBC Bitmap Summary ...............................................................................................230
11.0 Device Characteristics
11.1
GENERAL DC ELECTRICAL CHARACTERISTICS ..............................................................231
11.1.1
Recommended Operating Conditions .......................................................................231
11.1.2
Absolute Maximum Ratings .......................................................................................231
11.1.3
Capacitance ..............................................................................................................232
11.1.4
Power Consumption under Recommended Operating Conditions ............................232
11.1.5
Voltage Thresholds ....................................................................................................232
11.2
DC CHARACTERISTICS OF PINS, BY I/O BUFFER TYPES ...............................................233
11.2.1
Input, CMOS Compatible with Schmitt Trigger ..........................................................233
11.2.2
Input, PCI 3.3V ..........................................................................................................233
11.2.3
Input, SMBus Compatible ..........................................................................................233
11.2.4
Input, TTL Compatible ...............................................................................................234
11.2.5
Input, TTL Compatible with Schmitt Trigger ..............................................................234
11.2.6
Output, TTL Compatible Push-Pull Buffer .................................................................234
11.2.7
Output, Open-Drain Buffer .........................................................................................235
11.2.8
Output, PCI 3.3V .......................................................................................................235
11.2.9
Exceptions .................................................................................................................235
11.2.10 Terminology ...............................................................................................................235
11.3
INTERNAL RESISTORS ........................................................................................................236
11.3.1
Pull-Up Resistor .........................................................................................................237