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Evaluating and Programming the 29K RISC Family
are set for physical or virtual operation depending on operating system supplied in-
formation –– this is explained in detail below. DebugCore 2.0 allows the Break–PID
(BPID) to be specified when the breakpoint is requested by MonTIP.
D.3.3 Current PID
The 29K assumes the current PID is zero whenever the process is operating in
Supervisor mode. However, many operating systems run separate tasks in Supervi-
sor mode and still wish to support per–process breakpoints. When using virtual
memory addressing, the 29K maintains the current PID in a field of the Memory
Management Unit (MMU) register. However some processors, such as the
Am29200, do not support an MMU and have no control register.
DebugCore 2.0 takes the current PID from the
PID_p
field of the shared data
structure. Field
PID_p
contains the physical address of a 32–bit memory location
which identifies the current PID. If the field is zero then the MMU register is used to
obtain the current PID. When the
PID_p
option is used, it is likely that breakpoints
will be located at physical addresses. However, this restriction is not imposed by the
DebugCore.
An operating system can now run multiple tasks each executing in Supervisor
mode. When a task switch occurs, the OS must update the 32–bit memory location
used to maintain the current PID.
D.3.4 Virtual or Physical Breakpoints
OS–Boot typically runs application programs in User mode with address
translation turned on. This is supported by DebugCore 1.0 because the virtual to
physical address translation is one–to–one.
When instruction breakpoints are established with DebugCore 2.0 the shared
data structure is used to determine if the breakpoint is at a physical or virtual address.
If the BPID is greater than 0 (User mode) then field
user_CPS
is tested. This field
should be initialized by the OS to contain a copy of the CPS register value in use when
execution is in User mode. If the specified BPID is 0 then field
super_CPS
is tested.
These fields are tested to determine the equivalent PI–bit setting. When the PI–bit is
set in the CPS register, physical addressing is used. Virtual breakpoints are rejected if
there are no available IBC or DBC registers.
Some regions of operating system code may run Supervisor mode with alter-
nately virtual and physical addressing. For example, Freeze mode code always runs
with physical addressing. In this case DebugCore 1.0 type set–breakpoint messages
must be used to establish breakpoints at physically addressed locations.
There is always some danger in mixing DebugCore 1.0 breakpoints with De-
bugCore 2.0 breakpoints. As 1.0 type breakpoints will match against any identical
address value, regardless of the current PID and the PI–bit values.